CMPE 414/CMPE 641: Advanced VLSI Design |
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CMPE 414/CMPE 641: Advanced VLSI Design
Section 0101 Spring 2005 Instructor: Chintan Patel Office: ITE 322 Office Hours: Mon & Wed, 11:00 - 12:30 AM or by appointment Teaching Assistants: Abhishek Singh Office Hours: TBA Meeting Time and Location: Mon & Wed, ITE 375, 2:00 - 3:15 PM Announcements
Check regularly for important class information
All students are required to fill out the ABET survey below
Apr 18: Have your code ready, including test benches and waveform dumps for demo today. If your design is not complete, demo whatever you have done so far. Also keep the scripts ready so show primitive synthesis runs of your RTL code. Apr 11: We will discuss the project today, no lecture. Abhishek will be available to answer Verilog related questions. Rest of the class to be used for group discussions. Feb 28: If UMBC stays open and you are not able to make it to class due to the weather situation, you can submit your assignment on Wednesday without any late penalty Feb 07: Lecture 1 slides and assignment 1 posted, deadline extented to Monday 2/14. Course Material
Spring 2005 Syllabus (html version)
Lecture 1: Standard Cell Design (html version) Lecture 2: Abstract Generation (html version) Lecture 3: Std Cell Library/ Library Exchange Format (LEF) (html version) Lecture 4: Timing Library Format (TLF) (html version)
Assignments
Assignment 1: Due Monday 2/14
Assignment 2: Due Monday 2/21 Assignment 3: Due Wednesday 2/28 Assignment 4: Due Monday 3/07 Unless otherwise stated all assignments from now on are group based: Project Groups Assignment 5: Due before Spring Break (Friday 03/18) Assignment 6 (This is an individual assignment): Due Monday 3/28 Class Project: Last day of class
Cadence
Files for the abstract generator
UMBC AMI 0.6um library layouts/abstracts
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