[CMSC 411 Home] | [Syllabus] | [Project] | [VHDL resource] | [Homework 1-6] | [Homework 7-12] [files] |
Lec Date Subject Reading Homework
assigned due
1. 8/27 Introduction, terminology 1.1-1.6 HW1
8/28
9/1 Labor day holiday
9/2 open discussion, optional
2. 9/3 Benchmarks 2.1-2.5
9/4
3. 9/8 Performance, 2.6-2.8 HW2 HW1
9/9
4. 9/10 CPU operation skim 3.1-3.7
9/11 read p117-121
5. 9/15 Instructions and registers skim 3.8-3.11 HW3 HW2
9/16 read p145-150
6. 9/17 VHDL introduction Ashen 1.1-1.5
9/18 (optional if you know VHDL) VHDL web pages
7. 9/22 Arithmetic 4.1-4.4 HW4 HW3
9/23 Ashen 8.5
8. 9/24 ALU 4.5
9/25
9. 9/29 Multiply 4.6 HW5
9/30 Ashen 6.1-6.3
10. 10/1 Divide 4.7 HW4*
10/2
11. 10/6 Floating Point 4.8
10/7
12. 10/8 VHDL - circuits and debugging VHDL web pages HW6 HW5
10/9 Ashen 18.1-18.2
13. 10/13 Control Unit 5.1-5.3
10/14
14. 10/15 Microprogramming - review 5.4-5.5
10/16
15. 10/20 mid-term exam study
10/21
16. 10/22 Pipelining 1 6.1 HW6 *
10/23
17. 10/27 Pipelining 2 6.2-6.3 HW7
10/28
18. 10/29 Project outline and VHDL VHDL web pages HW8
10/30 Ashen 5.1-5.5 PROJ
19. 11/3 Pipelining Data Forwarding, Hazard 6.4-6.6 HW7
20. 11/4
21. 11/5 Cache 7.1-7.2 Proj 1 *
11/6 HW9 HW8
22. 11/10 Cache performance 7.3
11/11
23. 11/12 Virtual memory 1 7.4-7.5 HW10 HW9
11/13 Proj 2a *
24. 11/17 Virtual memory 2 handout
11/18
25. 11/19 I/O types and performance 8.1-8.3 HW11 HW10
11/20
26. 11/24 DVR, DVD-RW, CDR, CD-RW handout
11/25 Proj 2b *
11/26 open discussion, optional
11/27 Thanksgiving holiday
27. 12/1 Busses, I/O-processor connection 8.4-8.6 HW12 HW11
12/2
28. 12/3 Multiprocessors skim 9.1-9.4 Proj 3a *
12/4
29. 12/8 Review study HW12
12/9 Proj 3b *
30. 12/15 Final Exam Monday 6:00pm-8:00pm (none other than these two)
12/11 Final Exam Thursday 3:30pm-5:30pm (none other than these two)
No late homework or project accepted after midnight 12/15
Late penalty is 10% per week, limit 50%.
* submitted, not graded until next weekend (not late for a while)
Last updated 10/30/03