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CMSC 411 Computer Architecture Syllabus Spring 2007

Class schedule, topic and assignments for both sections

 0101 Tuesday and Thursday   11:30am-12:45pm  ITE 229
 0201 Tuesday and Thursday   5:30pm-6:45pm  ACIV 151

 Reading assignments: from third edition of textbook.
 The same handout and lecture is given in two lectures.
 Homework and projects are due on the same date.
 Computer Engineering majors have additional tasks.


Lec Date   Subject                                 Reading     Homework
                                                               assigned due

 1.
    1/30   Introduction, terminology               1.1-1.5     HW1

 2. 
    2/1    Benchmarks                              4.1-4.5

 3. 
    2/6    Performance,                            4.4-4.7     HW2       HW1

 4. 
    2/8    CPU operation                      skim 2.1-2.7
                                              read p60-64  

 5. 
    2/13   Instructions and registers         skim 2.8-2.15    HW3       HW2
                                              read p97-101

 6. 
    2/15   VHDL introduction                 VHDL WEB Pages
           (optional if you know VHDL)

 7. 
    2/20   Arithmetic                              3.1-3.3     HW4       HW3
                                             VHDL WEB Pages

 8. 
    2/22   ALU                               B.5-B.6 on CD                                       

 9. 
    2/27   Multiply                                3.4         HW5

 10. 
    3/1    Divide                                  3.5                   HW4*

 11. 
    3/6    Floating Point                          3.6 

 12. 
    3/8    VHDL - circuits and debugging     VHDL web pages    HW6       HW5

 13. 
    3/13  Microprogramming - review                5.5

 14. 
    3/15  mid-term exam                            study

          Spring Break

 15. 
    3/27  Control Unit                             5.1-5.4

 16. 
    3/29  Pipelining 1                             6.1                   HW6*

 17. 
    4/3   Pipelining 2                             6.2-6.3 

 18. 
    4/5   Project outline and VHDL          VHDL web pages     HW7
                                                               proj1

 19. 
    4/10  Pipelining Data Forwarding               6.4-6.6     proj2a

 20. 
    4/12  Hazard and stalls                        6.4-6.6     HW8       HW7
                                                               proj2b

 21. 
    4/17  Cache                                    7.1-7.2     HW9      Proj1*

 22. 
    4/19  Cache performance                        7.3         proj3a    HW8

 23. 
    4/24  Virtual memory 1                         7.4-7.5     HW10      HW9     
                                                                      Proj2a*

 24. 
    4/26  Virtual memory 2                         WEB page    proj3b

 25. 
    5/1   I/O types and performance                8.1-8.3     HW11     HW10
                                                                      Proj2b*

 26. 
    5/3   DVR, DVD-RW, CDR, CD-RW                  WEB page

 27.
    5/8   Busses, I/O-processor connection         8.4-8.7     HW12     HW11
                                                                      Proj3a*

 28. 
    5/10  Multiprocessors                     skim 9.1-9.4

 29. 
    5/15  Review                                   study                HW12
                                                                      Proj3b*

 30. 
    5/22  Final Exam 0101 10:30-12:30 room ITE 229  (none other than these two)
    5/17  Final Exam 0201  6:00-8:00 room ACIV 151  (none other than these two)
    Take either exam but not both (Bring ID card, show when turning in exam.)

    No late homework or project accepted after midnight 5/24
    Late penalty is 10% per week, penalty limit 50%.
    * submitted, not graded until next weekend (not late for a while)
    Projects are graded only once, do not do "submit" until finished.
    Check will be made for copying after midnight 5/24.
    Missing or copied projects get a zero.

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Last updated 5/1/07