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CMSC 411 Computer Architecture Syllabus

Class schedule, topic and assignments

Monday and Wednesday 5:30-6:45 ACIV 145

Tuesday and Thursday 2:30-3:45 SS 103 [Same Information]


Lec Date  Subject                                 Reading     Homework
                                                              assigned due
 1. 1/28  Introduction, terminology               1.1-1.6     HW1
    1/29

 2. 1/30  Benchmarks,                             2.1-2.5
    1/31
 
 3. 2/4   Performance,                            2.6-2.8     HW2       HW1
    2/5

 4. 2/6   CPU operation                     skim  3.1-3.7
    2/7                                     read  p117-121   when books in HW1   

 5. 2/11  Instructions and registers        skim  3.8-3.11    HW3       HW2
    2/12                                    read  p145-150

 6. 2/13  VHDL introduction                 Ashen 1.1-1.5
    2/14  (optional if you know VHDL)       VHDL web pages

 7. 2/18  Arithmetic                              4.1-4.4     HW4       HW3
    2/19                                    Ashen 8.5

 8. 2/20  ALU                                     4.5
    2/21

 9. 2/25  Multiply                                4.6         HW5
    2/26                                    Ashen 6.1-6.3

10. 2/27  Divide                                  4.7                   HW4*
    2/28

11. 3/4   Floating Point                          4.8                 
    3/5

12. 3/6   VHDL - circuits and debugging      VHDL web pages   HW6       HW5
    3/7                                     Ashen 18.1-18.2

13. 3/11  Control Unit                            5.1-5.3
    3/12

14. 3/13  Microprogramming - review               5.4-5.5
    3/14

15. 3/18  mid-term exam                                       study
    3/19

16. 3/20  Pipelining 1                            6.1         HW7       HW6 *
    3/21

    spring break

17. 4/1   Pipelining 2                            6.2-6.3
    4/2

18. 4/3   Project outline and VHDL           VHDL web pages   HW8       HW7
    4/4                                      Ashen 5.1-5.5

19. 4/8   Pipelining Data Forwarding              6.4-6.6     PROJ
    4/9

20. 4/10  Pipelining Hazards, stall               "           HW9       HW8
    4/11

21. 4/15  Cache                                   7.1-7.2             Proj 1 *
    4/16

22. 4/17  Cache performance                       7.3         HW10      HW9
    4/18

23. 4/22  Virtual memory 1                        7.4-7.5     
    4/23                                                             Proj 2a *

24. 4/24  Virtual memory 2                       handout      HW11      HW10
    4/25

25. 4/28  I/O types and performance               8.1-8.3
    4/29

26. 5/1   DVR, DVD-RW, CDR, CD-RW                 handout               HW11
    5/2                                                             Proj 2b *

27. 5/6   Busses, I/O-processor connection        8.4-8.6     HW12
    5/7

28. 5/8   Multiprocessors                   skim  9.1-9.4           Proj 3a *
    5/9

29. 5/13  Review                                  study                 HW12
    5/14                                                            Proj 3b *

30. 5/20  Final Exam 0101, Monday  6:00pm-8:00pm (no other)
    5/21  Final Exam 0102, Tuesday 1:00pm-3:00pm (no other)
             No late homework or project accepted after midnight 5/21
             * submitted, not graded until next weekend (not late for a while)

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Last updated 4/22/02