CMSC 411 Syllabus Spring 2017

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 CMSC 411 Computer Architecture Syllabus Spring 2017
 Class schedule, topic and assignments
 Monday  and Wednesday  4:00pm-5:15pm  SHH 150
 Tuesday and Thursday   2:30pm-3:45pm  ITE 227

 Reading assignments: from fourth or later edition of textbook.
 Homework and projects are due midnight on the date listed.
 Computer Engineering majors have additional tasks in
 some assignments.



Lec Date   Subject                            Reading          Homework
                                                               assigned due

 1.
    1/30   Introduction, terminology          1.1-1.5          HW1
    1/31
 2. 
    2/1    Benchmarks                         1.7
    2/2
 3. 
    2/6    Performance,                       1.4              HW2     HW1
    2/7
 4. 
    2/8    CPU operation                      skim 2.1-2.11 read p78  
    2/9
 5. 
    2/13   Instructions and registers         skim 2.1-2.11    HW3     HW2
                                              read p121
    2/14
 6. 
    2/15   VHDL introduction                  VHDL web Pages
    2/16
President's Day not a holiday for UMBC

 7. 
    2/20   Arithmetic                         C.5-C.6          HW4     HW3
                                              VHDL WEB Pages
    2/21
 8. 
    2/22   ALU                                3.1-3.2 
    2/23
 9. 
    2/27   Multiply                           3.3              HW5 
    2/28
 10. 
    3/1    Divide                             3.4
    3/2
 11. 
    3/6    Floating Point                     3.5                      HW4*
    3/7
 12. 
    3/8   VHDL - circuits and debugging      VHDL web pages   HW6     HW5 
    3/9
 13. 
    3/13   Microprogramming - review          web pages
    3/14   Snow day, move Tu Th back.
 14. 
    3/15   mid-term exam                                       study
    3/16   Microprogramming - review
Spring Break

 15. 
    3/27   Control Unit                       5.1-5.4
    3/28   mid-term exam
 16. 
    3/29   Pipelining 1                       4.1-4.3                  HW6*
    3/30   Control Unit and Pipelining
 17. 
    4/3    Pipelining 2                       4.5-4.6          HW7
    4/4
 18. 
    4/5    Project outline and VHDL           VHDL web pages   proj1
    4/6
 19. 
    4/10   Pipelining Data Forwarding         4.7              proj2a   HW7
    4/11
 20. 
    4/12   Hazard and stalls                  4.7              HW8
                                                               proj2b
    4/13
 21. 
    4/17   Cache                              5.1-5.2          HW9      Proj1*
    4/18
 22. 
    4/19   Cache performance                  5.3              proj3a   HW8
    4/20
 23. 
    4/24   Virtual memory 1                   5.4              HW10     HW9
                                                                        Proj2a*
    4/25
 24. 
    4/26   Virtual memory 2                   web page         proj3b
    4/27

 25. 
    5/1    I/O types and performance          6.3-6.7          HW11     HW10
                                                                        Proj2b*
    5/2
 26. 
    5/3    DVR, DVD-RW, CDR, CD-RW            web page
    5/4
 27.
    5/8    Busses, I/O-processor connection   6.5              HW12     HW11
                                                                        Proj3a*
    5/9
 28. 
    5/10   Multiprocessors
                                                               study
    5/11

 29. 
    5/15   Study Guide
                                                               study
    5/16


 30. 
    5/22  Final Exam   3:30pm-5:30pm  room SSH 150
    5/18  Final Exam   1:00pm-3:00pm  room ITE 227
  (Bring ID card, show when turning in exam.)
                                                                        HW12
                                                                        Proj3b

    No late homework accepted after midnight 5/24/2017
    Late penalty is 10% per week, penalty limit 50%.
    * submitted, not graded until next weekend (not late for a while)
    Projects are graded only once, do not do "submit" until finished.
    Check will be made for copying after midnight 5/24.
    Missing or copied projects get a zero.
CMSC 411 Computer Architecture Syllabus Spring 2017

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