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CMSC 411 Computer Architecture Syllabus Spring 2010

Class schedule, topic and assignments

 Tuesday and Thursday   11:30am-12:45pm  Sond 208

 Reading assignments: from fourth edition of textbook, 3rd ed OK.
 Homework and projects are due midnight on the date listed.
 Computer Engineering majors have additional tasks in
 some assignments.


Lec Date   Subject                            Reading          Homework
                                                               assigned due

 1.
    1/28   Introduction, terminology          1.1-1.5          HW1

 2. 
    2/2    Benchmarks                         1.7

 3. 
    2/4    Performance,                       1.4              HW2     HW1

 4. 
    2/16   CPU operation                      skim 2.1-2.11
                                              read p78  

 5. 
    2/16   Instructions and registers         skim 2.1-2.11    HW3
                                              read p121

 6. 
    2/18   VHDL introduction                  VHDL web Pages             HW2

 7. 
    2/18   Arithmetic                         C.5-C.6          HW4
                                              VHDL WEB Pages

 8. 
    2/23   ALU                                3.1-3.2                    HW3

 9. 
    2/25   Multiply                           3.3              HW5

 10. 
    3/2    Divide                             3.4                        HW4*

 11. 
    3/4    Floating Point                     3.5 

 13. 
    3/9   Microprogramming - review          web pages         HW6     HW5

 14. 
    3/11   mid-term exam                                       study

Spring Break (note change in lecture numbering around Spring Break)

 12. 
    3/23   VHDL - circuits and debugging      VHDL web pages

 15. 
    3/25   Control Unit                       5.1-5.4                    HW6*

 16. 
    3/30   Pipelining 1                       4.1-4.3    

 17. 
    4/1    Pipelining 2                       4.5-4.6          HW7

 18. 
    4/6    Project outline and VHDL           VHDL web pages   proj1

 19. 
    4/8    Pipelining Data Forwarding         4.7              proj2a  HW7

 20. 
    4/13   Hazard and stalls                  4.7              HW8     Proj1*
                                                               proj2b

 21. 
    4/15   Cache                              5.1-5.2          HW9

 22. 
    4/20   Cache performance                  5.3              proj3a

 23. 
    4/22   Virtual memory 1                   5.4              HW10    HW8
                                                                         Proj2a*

 24. 
    4/27   Virtual memory 2                   web page         proj3b  HW9

 25. 
    4/29   I/O types and performance          6.3-6.7          HW11    HW10
                                                                         Proj2b*

 26. 
    5/4    DVR, DVD-RW, CDR, CD-RW            web page

 27.
    5/6    Busses, I/O-processor connection   6.5              HW12    HW11
                                                                         Proj3a*

 28. 
    5/11   Multiprocessors                    skim 7.1-7.4

 29. 
    5/13  Review                                              study    HW12
                                                                         Proj3b*

 30. 
  5/20  Final Exam   10:30am-12;30pm  room Sond 208 
  (Bring ID card, show when turning in exam.)

    No late homework or project accepted after midnight 5/20
    Late penalty is 10% per week, penalty limit 50%.
    * submitted, not graded until next weekend (not late for a while)
    Projects are graded only once, do not do "submit" until finished.
    Check will be made for copying after midnight 5/20.
    Missing or copied projects get a zero.

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Last updated 5/5/10