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CMSC 411 Computer Architecture Syllabus Spring 2008

Class schedule, topic and assignments for both sections

 0101 Tuesday and Thursday   11:30pm-12:45pm  ITE 229

 Reading assignments: from third edition of textbook.
 Homework and projects are due on the later date listed.
 Computer Engineering majors have additional tasks in
 some assignments.


Lec Date   Subject                                 Reading     Homework
                                                               assigned due

 1.
    1/29   Introduction, terminology               1.1-1.5     HW1

 2. 
    1/31   Benchmarks                              4.1-4.5

 3. 
    2/5    Performance,                            4.4-4.7     HW2       HW1

 4. 
    2/7    CPU operation                      skim 2.1-2.7
                                              read p60-64  

 5. 
    2/12   Instructions and registers         skim 2.8-2.15    HW3       HW2
                                              read p97-101

 6. 
    2/14   VHDL introduction                  VHDL WEB Pages

 7. 
    2/19   Arithmetic                              3.1-3.3     HW4       HW3
                                              VHDL WEB Pages

 8. 
    2/21   ALU                               B.5-B.6 on CD          

 9. 
    2/26   Multiply                                3.4         HW5

 10. 
    2/28   Divide                                  3.5                   HW4*

 11. 
    3/4    Floating Point                          3.6 

 12. 
    3/6    VHDL - circuits and debugging     VHDL web pages    HW6       HW5

 13. 
    3/11   Microprogramming - review               5.5

 14. 
    3/13   mid-term exam                                       study

           Spring Break

 15. 
    3/25   Control Unit                            5.1-5.4

 16. 
    3/27   Pipelining 1                            6.1                   HW6*

 17. 
    4/1    Pipelining 2                            6.2-6.3 

 18. 
    4/3    Project outline and VHDL          VHDL web pages     HW7
                                                                proj1

 19. 
    4/8    Pipelining Data Forwarding              6.4-6.6      proj2a

 20. 
    4/10   Hazard and stalls                       6.4-6.6      HW8      HW7
                                                                proj2b

 21. 
    4/15  Cache                                    7.1-7.2      HW9      Proj1*

 22. 
    4/17  Cache performance                        7.3          proj3a   HW8

 23. 
    4/22  Virtual memory 1                         7.4-7.5      HW10     HW9     
                                                                         Proj2a*

 24. 
    4/24  Virtual memory 2                         WEB page     proj3b

 25. 
    4/29 I/O types and performance                 8.1-8.3      HW11     HW10
                                                                         Proj2b*

 26. 
    5/1   DVR, DVD-RW, CDR, CD-RW                  WEB page

 27.
    5/6   Busses, I/O-processor connection         8.4-8.7      HW12     HW11
                                                                         Proj3a*

 28. 
    5/8  Multiprocessors                      skim 9.1-9.4

 29. 
    5/13  Review                                   study                 HW12
                                                                         Proj3b*

 31. 
 Tu 5/15  Final Exam 0101 10:30-12:30 room ITE 229  (none other)
          (Bring ID card, show when turning in exam.)

    No late homework or project accepted after midnight 5/15
    Late penalty is 10% per week, penalty limit 50%.
    * submitted, not graded until next weekend (not late for a while)
    Projects are graded only once, do not do "submit" until finished.
    Check will be made for copying after midnight 5/15.
    Missing or copied projects get a zero.

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Last updated 5/6/08