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CMSC 411 Computer Architecture Syllabus Spring 2005

Class schedule, topic and assignments

 Monday and Wednesday    2:00-3:15  PUP 208

 Reading assignments:
   from third edition of textbook


Lec Date   Subject                                 Reading     Homework
                                                               assigned due
 1. 1/31  Introduction, terminology                1.1-1.5     HW1

 2. 2/2    Benchmarks                              4.1-4.5
 
 3. 2/7    Performance,                            4.4-4.7     HW2       HW1

 4. 2/9    CPU operation                      skim 2.1-2.7
                                              read p60-64  

 5. 2/14   Instructions and registers         skim 2.8-2.15    HW3       HW2
                                              read p97-101

 6. 2/16   VHDL introduction                 Ashen 1.1-1.5
           (optional if you know VHDL)       VHDL web pages

 7. 2/21   Arithmetic                              3.1-3.3     HW4       HW3
                                             Ashen 8.5

 8. 2/23   ALU                                     B.5-B.6 on CD
                                               

 9. 2/28   Multiply                                3.4         HW5
                                             Ashen 6.1-6.3

10. 3/2    Divide                                  3.5                   HW4*

11. 3/7    Floating Point                          3.6 

12. 3/9    VHDL - circuits and debugging     VHDL web pages    HW6       HW5
                                              Ashen 18.1-18.2

13. 3/14  Microprogramming - review                5.5

14. 3/16  mid-term exam                            study

15. 3/28  Control Unit                             5.1-5.4

16. 3/30  Pipelining 1                             6.1                   HW6*

17. 4/4   Pipelining 2                             6.2-6.3 

18. 4/6   Project outline and VHDL          VHDL web pages     HW7
                                            Ashen  5.1-5.5     PROJ

19. 4/11   Pipelining Data Forwarding              6.4-6.6     

20. 4/13   Hazard and stalls                       6.4-6.6     HW8

21. 4/18   Cache                                   7.1-7.2     HW9       HW7
                                                                     Proj 1*

22. 4/20   Cache performance                       7.3                   HW8

23. 4/25   Virtual memory 1                        7.4-7.5     HW10      HW9     
                                                                     Proj 2a*

24. 4/27  Virtual memory 2                        handout

25. 5/2    I/O types and performance               8.1-8.3     HW11     HW10

26. 5/4    DVR, DVD-RW, CDR, CD-RW                 handout
                                                                     Proj 2b*

27. 5/9    Busses, I/O-processor connection        8.4-8.7     HW12     HW11

28. 5/11   Multiprocessors                    skim 9.1-9.4           Proj 3a*

29. 5/16   Review                                  study                HW12
                                                                     Proj 3b*

30. 5/23  1:00pm - 3:00pm  Final Exam   (no other)

    No late homework or project accepted after midnight 5/24
    Late penalty is 10% per week, limit 50%.
    * submitted, not graded until next weekend (not late for a while)

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Last updated 1/14/05