[CMSC 411 Home] | [Syllabus] | [Project] | [VHDL resource] | [Homework 1-6] | [Homework 7-12] [files] |
Lec Date Subject Reading Homework
assigned due
1. 1/27 Introduction, terminology 1.1-1.6 HW1
1/28
2. 1/29 Benchmarks 2.1-2.5
1/30
3. 2/3 Performance, 2.6-2.8 HW2 HW1
2/4
4. 2/5 CPU operation skim 3.1-3.7
2/6 read p117-121 HW1
5. 2/10 Instructions and registers skim 3.8-3.11 HW3 HW2
2/11 read p145-150
6. 2/12 VHDL introduction Ashen 1.1-1.5
2/13 (optional if you know VHDL) VHDL web pages
7. 2/17 Arithmetic 4.1-4.4 HW4 HW3
2/18 Ashen 8.5
8. 2/19 ALU 4.5 HW3
2/20
9. 2/24 Multiply 4.6 HW5
2/25 Ashen 6.1-6.3
10. 2/26 Divide 4.7 HW4*
2/27 HW3 snow
11. 3/3 Floating Point 4.8 HW4* snow
3/4
12. 3/5 VHDL - circuits and debugging VHDL web pages HW6 HW5
3/6 Ashen 18.1-18.2
13. 3/10 Control Unit 5.1-5.3
3/11
14. 3/12 Microprogramming - review 5.4-5.5
3/13
15. 3/17 mid-term exam study
3/18
16. 3/19 Pipelining 1 6.1 HW7 HW6 *
3/20
17. 3/31 Pipelining 2 6.2-6.3
4/1
18. 4/2 Project outline and VHDL VHDL web pages HW8 HW7
4/3 Ashen 5.1-5.5
19. 4/7 Pipelining Data Forwarding 6.4-6.6 PROJ
4/8
20. 4/9 Pipelining Hazards, stall " HW9 HW8
4/10
21. 4/14 Cache 7.1-7.2 Proj 1 *
4/15
22. 4/16 Cache performance 7.3 HW10 HW9
4/17
23. 4/21 Virtual memory 1 7.4-7.5
4/22 Proj 2a *
24. 4/23 Virtual memory 2 handout HW11 HW10
4/24
25. 4/28 I/O types and performance 8.1-8.3
4/29
26. 4/30 DVR, DVD-RW, CDR, CD-RW handout HW11
5/1 Proj 2b *
27. 5/5 Busses, I/O-processor connection 8.4-8.6 HW12
5/6
28. 5/7 Multiprocessors skim 9.1-9.4 Proj 3a *
5/8
29. 5/12 Review study HW12
5/13 Proj 3b *
30. 5/19 Final Exam Monday 5:30pm-7:30pm (none other than these two)
5/15 Final Exam Thursday 2:30pm-4:30pm (none other than these two)
No late homework or project accepted after midnight 5/19
Late penalty is 10% per week, limit 50%.
* submitted, not graded until next weekend (not late for a while)
Last updated 2/19/03