University of
Department of Computer Science and
Electrical Engineering
CMSC 611-101, Fall
2009
Advanced Computer Architecture
Monday and Wednesday
4:00 PM - 5:15 PM, ACIV 145
Course
Information
Instructor and TA Contact Information
Dr.
Mohamed Younis
Office: ITE 318
E-mail: younis@cs.umbc.edu
URL: http://www.cs.umbc.edu/~younis
Office hours: Monday and Wednesday
3:00 PM - 4:00 PM
Research
interest:
Wireless Networks, Real-time systems,
Fault tolerant computing, Tool support for embedded systems, Network Security
Teaching assistant
David Walser
Office:
ITE 340
E-mail: walser1@umbc.edu
Office
hours: Tuesday and Thursday 11:30 AM – 1:00 PM
Textbook:
Computer Architecture: A Quantitative Approach, 3rd or 4th Edition
John L. Hennessy and David A. Patterson
Morgan Kaufmann Publishers, ISBN 1-55860-596-7
Course
Outline
1. Quantitative Principles of Computer Design
· The Task of a Computer Designer
· Technology and Computer Usage Trends
· Cost and Trends in Cost
· Measuring and Reporting Performance
· Benchmarks and metrics
· Classification of Instruction Set Architectures
·
Instruction
Formats and Semantics
·
Memory
Addressing Modes
·
Operations
in the Instruction Set
·
Encoding
and Instruction Set
·
The
Role of Compilers
·
Basic
Pipeline Operations
·
Data
and Control Pipeline Hazards
·
Instruction-Level
Parallelism
·
Dynamic
Instruction Scheduling and Branch Prediction
·
Cache
Design Issues
·
Performance
Evaluation
·
Virtual
Memory Addressing
·
Memory
Protection Mechanisms
·
Memory
coherency techniques
·
Types
of Storage Devices
·
Buses-Connecting
I/O Devices to CPU/Memory
·
I/O
Performance Measures
·
Reliability,
Availability, and RAID
·
Interfacing
to an Operating System
·
Interconnection
network Media
·
Connecting
More Than Two Computers
·
Practical
Issues for Commercial Interconnection Networks
·
Examples
of Interconnection Networks
7. Multiprocessors (Time Permitting)
·
Characteristics
of Application Domains
·
Centralized
Shared-Memory Architectures
·
Distributed
Shared-Memory Architectures
·
Execution
Synchronization
·
Models
of Memory Consistency
Course work
Grade distribution
Midterm exam
30%
Final exam
30%
Project
25%
Homework
15%
· 3 assignments will be given and their average is to be normalized to %15 of the final grade
· Assignments are due in class. Late assignments are not accepted.
· The scope of the exams is incremental (final exam is not comprehensive)
· The project is mainly hardware design assignments by writing an architecture simulator in a high level programming language, e.g., C.
· UMBC rules apply to cheating/copying. You may work together and discuss homework and the project. You must do your own work and not copy from anyone else.
· Copying/cheating will result in a minimum punishment of a zero grade for the assignment or project.
Course grade
Range
A
90% - 100%
B
80% -89.9%
C
70% -79.9%
D
60% - 69.9%
Lecture
Date
Subject
1
September 2, 2009
2
September 9, 2009
3
September 14, 2009
4
September 16, 2009
5
September 21, 2009
6
September 23, 2009
7
September 28, 2009
8
September 30, 2009
9
October 5, 2009
10
October 7, 2009
11
October 12, 2009
12
October 14, 2009
13
October 19, 2009
14
October 21, 2009
15
October 26, 2009
Review
16
October 28, 2009
Midterm exam #1
17
November 2, 2009
18
November 4, 2009
Hardware Assisted Speculative Execution
19
November 9, 2009
20
November 11, 2009
21
November 16, 2009
22
November 18, 2009
Optimizing Cache Performance (Cont.)
23
November 23, 2009
24
November 25, 2009
Main Memory (Cont.)
25
November 30, 2009
Main Memory (Cont.)
26
December 2, 2009
27
December 7, 2009
28
December 9, 2009
Introduction to Multiprocessor Systems
29
December 14, 2009
Cache Coherence Protocols
30
December 21, 2009
Final exam (3:30 PM-5:30 PM)
Assignment
Date Out
Due Date
September 21, 2009
September 28, 2009
October 19, 2009
October 26, 2009
November 25, 2009
December 2, 2009
|
Project |
Date Out |
Due Date |
|
October 14, 2009 |
December 7, 2009 |
§ Cadance VHDL Tutorial (Jim Plusquellic)
Last Revised: December 3, 2009