CS411 Details of homework assignments HW0..HW6 and Midterm

The most important item on all homework is YOUR NAME! No name, no credit. Staple or clip pages together.

Homework must be submitted when due. You loose 10 points, one grade, for every day homework is late. Paper or EMail to squire@cs.umbc.edu is acceptable. If I can not read or understand your homework, you do not get credit. Type or print if your handwriting is bad. Homework is always due on a scheduled class day within 15 minutes after the start of the class. If class is cancelled then homework is due the next time the class meets.

  EMail only plain text! No word processor formats.
       You may use a word processor or other software tools and
       print the results and turn in paper.

HW0 Send Mail Message to E-Register 1 point

All EMail related to this course must have a subject line that starts CMSC411 or CS411 followed by short subject. Homework on paper or EMail would look like CS411 HW0 on the top of the paper or as the subject line. Even on EMail, include your first and last name (some EMail return addresses do not give your name).

For HW0 send an EMail, no paper this time, with your name and grading method, {letter, P/F, audit, just sitting in}

HW1 Terminology 5 points

  Book Page 45, Exercises 1.1 through 1.26.
     The answer is just two columns. The first column is the numbers
     1 through 26, the second column is the answer letter from the set {a-z}

HW2 Evaluating Benchmarks 25 points

  Please submit only the answers, do not copy the questions.
       Be sure to label the answers with the Exercize number.
       Book Page 93,  Exercises 2.18, 2.19, 2.20
       Book Page 101, Exercises 2.41, 2.42

HW3 Analyzing assembly and machine code 25 pts

  Using the program  matmul.c  from the Downloadable source:
  1) Count the instructions inside the inner loop on 'k'
  2) How many times is this loop executed?
  3) Give one assembly language statement for the double multiply
  4) Give the corresponding 32 bit hexadecimal for the double multiply
  5) Give the instruction field format values for the double multiply

  Note: The answers are not unique. It depends on which compiler is used,
  which options are used and possibly which computer is used.

  This assignment must be run on an SGI machine.

  Method 1 for getting assembly language source code to a file matmul.s
        gcc -g3 -O4 -S matmul.c

  Method 2 for getting assembly language source code to a file u.out.s
        c89 -g3 -O4 -S matmul.c

  Method 3 for getting assembly language source code to a file assy.out
        c89 -g3 -O4 matmul.c
        gdb a.out > assy.out
        break main
        run
        disassemble
        q
        y

  A method for getting hex printout of 32 bit instructions to file hex.out
       c89 -g3 -O4 matmul.c
       gdb a.out > hex.out
       break main
       run
       x/208xw 0x400980
       q
       y

  The instruction field format is on page 117 of textbook, also 121, 131.
  mul.d is the MIPS=SGI double precision floating point multiply, R format.

  Pitfalls: The compiler may use optimization and unroll the loop. This
  means a few  mul.d and add.d instructions may be in the loop and the
  number of times through the loop will be proportionally less.
  Most of the instruction in the loop are "housekeeping", there are various
  instrutions for loading and storing data, l.d and s.d are just one pair.
  Run the debugger, gdb, without the redirection "> xxx.out" first.
  When running with redirection you will not see what you type! Be careful!
  You may find the disassembly from the debugger the most accurate to
  count while being the hardest to find the inside of the loop.
  Optimization is O as in oh!, not 0 as in zero!  -O2, -O3 and -O4 can be used.

HW4 Use ecomp and esim on a 32 bit carry select adder 25 pts

  Each bit of a carry select adder uses two full adders.
  The length of each group of bits should increase so that the
  carry out of the group is computed "just in time."

  EMAIL  PLAIN TEXT ONLY!  do not attach as base 64 encoded.
  Please just EMail the file that goes into  ecomp  the compiler
  as one plain text EMail message.

  Submit as one file all that is needed to run the following three(3)
  test cases:

  a<=#hFFFFFFFF    b<=#h00000000   cin<=#b1
  a<=#hAAAAAAAA    b<=#h0C630002   cin<=#b0
  a<=#h11111111    b<=#hEEEEEEEE   cin<=#b1

  Output the 32 bit sum and cout at appropriate times.

  Your circuits must run. Incorrect results loose points.
  Late submittals loose even more points.
  You must include comments so anyone reading your circuits can
  understand them.

  Follow the link below to Project and Download for more information.
  See the writeups on ecomp, esim, tutorial and sample circuits.
  The building blocks become part of your final project.


  A typical simulator control file would be:
     esim load your_file.net
     esim set -hex a FFFFFFFF
     esim set -hex b 00000000
     esim set cin 1
     esim run 500
     puts "a= [esim show -hex a], b= [esim show -hex b]"
     puts "sum= [esim show -hex sum], cout= [esim show cout]"
     esim set -hex a 00000000
     esim set -hex b FFFFFFFF
     esim set cin 1
     esim run 500
     puts "a= [esim show -hex a], b= [esim show -hex b]"
     puts "sum= [esim show -hex sum], cout= [esim show cout]"

     ... set up other test cases


  I would expect you main circuit to look something like:

     signal a[32] <= #hFFFFFFFF;
     signal b[32] <= #h00000000;
     signal cin <= #b1;
     signal sum[32];
     signal cout;
     circuits
       some_name use your_adder(a, b, cin, sum, cout);
     end circuits;

  Thus, you have defined "your_adder" to be the 32 bit carry select adder.
  You may name the adder whatever you like, and name the component anything
  that the simulator considers legal.  Please make the input signal names
  a, b, and cin,  and the output signal names s or sum, and cout. Thank you.

  The three figures down below a C-SAS carry-select adder stage to define
  as a component, the internal logic for 6 of 32 stages of a component,
  and the inputs and outputs of the csadd component.

HW5 Five questions 25 pts

 
  1. Write two esim statements that implements the truth table below
     the answer starts   x <=
                         y <=

        a b c | x y
        0 0 0 | 0 0
        0 0 1 | 0 0
        0 1 0 | 1 0
        0 1 1 | 0 1
        1 0 0 | 0 0
        1 0 1 | 1 0
        1 1 0 | 0 0
        1 1 1 | 0 1

  2. Write the esim statement that implements the logic diagram

          +----+
      a --|AND |____
      b --|    |   |
          +----+   | +----+
                   --|XOR |
          +----+     |    |
      c --|OR  |_____|    |__
      d --|    |     |    |  |
          +----+     |    |  |
                   --|    |  |
          +----+   | |    |  |
      e --|NOT |---| +----+  |  +----+
          +----+             |--|AND |
                                |    |-- g
      f ------------------------|    |
                                +----+

  3. Draw the logic diagram that represents the esim statement

       g <= ((~a|b)^(c&~d))|(e^~f);

  4. textbook, Page 330, Problem 4.49 with the additional instructions:
     Use A, B, E and F  all as four ones. e.g. A <= #b1111     etc.
     The answer is a six bit result S.

  5. textbook, page 331, Problem 4.50
     Watch out, the problem states 2T, not 1T
     Be sure to count the longest path.

HW6 Serial Multiply and Divide simulation 25 pts

 
  Extended due date: Monday March 16, 1998.

  Code up a circuit that does a 32bit times 32bit multiplication and
  then divides the 64 bit product by the multiplier.

  This is to be an esim circuit that is submitted as plain text as EMail.
  Include all the  ecomp  input that is needed, including all adder
  components and counters. Catonate a simulator control file that
  shows at least the 64 bit register between the multiply and divide and
  at the end of both operations.

  Optionally you may start with a 64bit dividend, divide by a divisor and
  then multiply by the divisor. Be sure to zero the remainder register
  before doing the multiply.

  The fastest circuit will be based on the concepts in the sample
  circuits  mul_ser  and  div_ser  available in the download web page.

  A slightly slower circuit can be built using the algorithm 3 for
  multiply, book page 256, 257  and the third division algorithm,
  book page 270,271. You might want to do the shift on the rising clock.
  Be sure the clock time is long enough for your circuit to settel.

  If you can not make it work with one 32 bit adder (and possibly another
  1 bit adder stage) then try with two 32 bit adders with one dedicated
  to multiply and the other dedicated to divide. (Two points off for
  using the extra hardware.)

  The basic block diagram is in the textbook page 271.
  An expanded diagram may appear below.

  It is OK to have one too few shifts or one too many shifts.
  i.e. be off by a factor of 2. Just get the control and multiplexors
  working to do the operations.

  Basic long hand multiply  
     7 * 12 = 84 

             1100        12
           * 0111         7
      -----------
             1100
            1100
           1100
          0000
      -----------
         01010100       84


  Basic long hand divide (non restoring algorithm always adds or subtracts)
           12
          ____    remainder 1
       7 / 85


    0101 0101      initial dividend 8 bits here, 64 bits in homework
   01010 101_      shift left one place, bottom bit unknown at this time
   11001           subtract 7 by adding ones complement of 7 with cin=1
   ----------
   00011 1011      complement of top sum bit goes into quotient bit lo[0]

   00111 011_      shift left one place
   11001           previous quotient bit equal 1 means subtract
   ----------
   00000 0111      complement of top sum bit goes into quotient bit lo[0]

   00000 111_      shift left one place
   11001           previous quotient bit equal 1 means subtract
   ----------
   11001 1110      complement of top sum bit goes into quotient bit lo[0]

   10011 110_      shift left one place (fourth and last time)
   00111           previous quotient bit equal 0 means add
   ----------
   11010 1100      complement of top sum bit goes into quotient bit lo[0]
         ****      final quotient in lo register ****
   00111           remainder negative, add divisor to correct
   -----
   00001           final remainder in hi register (not required for homework)


Midterm exam. 15% of course grade

  Closed book. Multiple choice questions based on reading assignments
  and esim lectures and homework.
  Exam covers book: 1.1-1.6
                    2.1-2.8
                    4.1-4.8
  Exam covers homework: HW1-HW6
  Exam covers esim tutorial.
 

Last updated 3/9/98