[CMSC 411 Home] | [Syllabus] | [Project] | [VHDL resource] | [Homework 1-6] | [Homework 7-12] [files] |
Lec Date Subject Reading Homework
assigned due
1. 8/28 Introduction, terminology 1.1-1.6 HW1
8/29
2. 9/2 (no class)(Benchmarks in L1 and L3) 2.1-2.5
9/3 Benchmarks
3. 9/4 Performance, 2.6-2.8 HW2 HW1
9/5
4. 9/9 CPU operation skim 3.1-3.7
9/10 read p117-121 when books in HW1
5. 9/11 Instructions and registers skim 3.8-3.11 HW3 HW2
9/12 read p145-150
6. 9/16 VHDL introduction Ashen 1.1-1.5
9/17 (optional if you know VHDL) VHDL web pages
7. 9/18 Arithmetic 4.1-4.4 HW4 HW3
9/19 Ashen 8.5
8. 9/23 ALU 4.5
9/24
9. 9/25 Multiply 4.6 HW5
9/26 Ashen 6.1-6.3
10. 9/30 Divide 4.7 HW4*
10/1
11. 10/2 Floating Point 4.8
10/3
12. 10/7 VHDL - circuits and debugging VHDL web pages HW6 HW5
10/8 Ashen 18.1-18.2
13. 10/9 Control Unit 5.1-5.3
10/10
14. 10/14 Microprogramming - review 5.4-5.5
10/15
15. 10/16 mid-term exam study
10/17
16. 10/21 Pipelining 1 6.1 HW7 HW6 *
10/22
17. 10/23 Pipelining 2 6.2-6.3
10/24
18. 10/28 Project outline and VHDL VHDL web pages HW8 HW7
10/29 Ashen 5.1-5.5
19. 10/30 Pipelining Data Forwarding 6.4-6.6 PROJ
10/31
20. 11/4 Pipelining Hazards, stall " HW9 HW8
11/5
21. 11/6 Cache 7.1-7.2 Proj 1 *
11/7
22. 11/11 Cache performance 7.3 HW10 HW9
11/12
23. 11/13 Virtual memory 1 7.4-7.5
11/14 Proj 2a *
24. 11/18 Virtual memory 2 handout HW11 HW10
11/19
25. 11/20 I/O types and performance 8.1-8.3
11/21
26. 11/25 DVR, DVD-RW, CDR, CD-RW handout HW11
11/26 Proj 2b *
27. 12/2 Busses, I/O-processor connection 8.4-8.6 HW12
12/3
28. 12/4 Multiprocessors skim 9.1-9.4 Proj 3a *
12/5
29. 12/9 Review study HW12
12/10 Proj 3b *
30. 12/12 Final Exam Thursday 3:30pm-5:30pm (none other than these two)
12/16 Final Exam Monday 6:00pm-8:00pm (none other than these two)
No late homework or project accepted after midnight 12/16
Late penalty is 10% per week, limit 50%.
* submitted, not graded until next weekend (not late for a while)
Last updated 8/9/02