University of
Department of Computer Science and
Electrical Engineering
CMPE 411, Fall 2017
Computer Architecture
Tuesday and Thursday
11:30 AM--12:45 PM, ITE 233
Course Information
Instructor and TA Contact Information
Dr.
Mohamed Younis
Office: ITE 318
E-mail: younis@cs.umbc.edu
URL: http://www.cs.umbc.edu/~younis
Lab:
Embedded Systems and Networks Lab
Office hours: Tuesday and Thursday
(10:30 - 11:30 am)
Research
interest:
Wireless Ad-hoc and Sensor Networks, Fault
tolerant computing and communication, Real-time systems, Security and
Underwater communications, Vehicular networks
Teaching Assistant
Mr. Akram Ahmed
Office: ITE 349B
E-mail: akrama1@umbc.edu
Office hours: Monday and Wednesday
(1:00 - 2:00 pm)
Textbook:
|
Computer Organization and Design, The hardware/software
interface, Fifth Edition David
A. Patterson and John L. Hennessy Morgan
Kaufmann Publishers, ISBN 978-0-12-407726-3 978-0-12-374493-7 |
Course
Outline
1. Instruction
Set Architecture
Instruction formats and semantics
Addressing modes
2.
Performance Evaluation
Measures of performance
Benchmarks and metrics
3.
Machine Arithmetic
ALU design
Integer multiplication and division
Floating-point arithmetic
4.
Processor Design
Datapath design
Instruction execution and sequencing
Hardwired and microcode control
5.
Pipelining and Instruction-Level Parallelism
Pipelining (Basic Pipeline Operations)
Data and Control Pipeline Hazards
Instruction-Level Parallelism
6.
Memory Hierarchy
Cache design & evaluation
Virtual addressing
Performance evaluation
7.
Input/Output
Types of I/O devices
Device access and interface
Device control
I/O performance
8.
Multiprocessing (time permitting)
Interconnection networks
Programming issues
Course work
Grade distribution
Mid-term Exam
25%
Final Exam
30%
Project
25%
Homework
20%
Five assignments will be given and normalized to %20 of the final grade
Assignments are due in class. Late assignments are not accepted.
Final Exam is comprehensive covering the whole subjects included in the course and discussed in the lectures
The project emphasizes architecture design. It requires writing an architecture simulator using a high level programming language such as C++.
Late projects are not accepted.
Copying/cheating will result in a minimum punishment of a zero grade for the assignment or project.
Academic Integrity Statement:
By enrolling is this course, each student assumes the responsibilities of an active participant in UMBCs scholarly community in which everyones academic work and behavior and held to the highest standards of honesty. Cheating, fabrication, plagiarism, and helping others to commit these acts are all forms of academic dishonesty, and they are wrong. Academic misconduct could result in disciplinary action that may include, but is not limited to, suspension or dismissal. To find useful information about avoiding plagiarism infractions through appropriate citations, or to read the full policy regarding student academic misconduct for the graduate school, please see http://www.umbc.edu/provost/integrity.
Course grade
Range
A
90% - 100%
B
80% -89.9%
C
70% -79.9%
D
60% - 69.9%
Subject
1
August 31, 2017
2
September 5, 2017
3
September 7, 2017
4
September 12, 2017
5
September 14, 2017
6
September 19, 2017
7
September 21, 2017
8
September 26, 2017
9
September 28, 2017
10
October 3, 2017
11
October 5, 2017
12
October 10, 2017
13
October 12, 2017
14
October 17, 2017
15
October 19, 2017
16
October 24, 2017
Instruction Level Parallelism
17
October 26, 2017
18
October 31, 2017
Midterm Exam
19
November 2, 2017
Dynamic Pipeline Scheduling
20
November 7, 2017
21
November 9, 2017
22
November 14, 2017
Cache Memory (Cont.)
23
November 16, 2017
24
November 21, 2017
Virtual Memory (Cont.)
25
November 28, 2017
26
November 30, 2017
27
December 5, 2017
28
December 7, 2017
29
December 12, 2017
30
December 14, 2017
Final Exam (10:30AM--12:30PM)
Assignment
Date Out
Due Date
September 14, 2017
September 21, 2017
September 28, 2017
October 5, 2017
October 10, 2017
October 17, 2017
October 19, 2017
October 26, 2017
November 21, 2017
November 28, 2017
Project |
Date Out |
Due Date |
October 26, 2017 |
December 9, 2017 |
· Cadance VHDL Tutorial (Jim Plusquellic)
Last Revised:
December 12, 2017