CMPE 212: Principles of Digital Design

This course introduces students to the science of digital design. The topics covered include: Boolean algebra; logic theorems; logic circuits and methods for their simplification, including Karnaugh maps and the Quine-McCluskey algorithm; combinational design; electrical characteristics of gates, timing, races and hazards; sequential circuits, their specification via state machines and minimization; principles of register transfer notation; exposure to hardware description language(s); and synthesis tools. This course includes a laboratory.

Prerequisites: None

Textbook:

Digital Logic Circuit Analysis and Design, 1/e (1995), or 2/e (2021)

Victor P. Nelson, H. Troy Nagle, Bill D. Carroll and J. David Irwin

Prentice Hall, ISBN 978-0134638942

Course Outline

1. Number Systems and Codes

o Introduction to number systems

o Number systems conversion

o Representation of binary numbers

o Arithmetic and computer codes

2. Algebraic Methods for Analysis and Synthesis of Logic Circuits

o Binary arithmetic Fundamentals of Boolean Algebra

o Switching functions and circuits

o Analysis and synthesis of combinational circuits

o Computer-aided design of logic circuits

3. Simplification of Switching Functions

o Characteristics of minimization methods

o Methods: Karnaugh maps, Quine-McCluskey and Patrick's algorithms

o Dealing with timing hazards

o Computer-aided minimization of switching functions

4. Modular Combinational Logic

o Decoders, encoders, multiplexers, De-multiplexers comparatorss

o Binary arithmetic elementss

5. Combinational Circuit Design with Programmable Logic Devices

o Logic-array circuitss

o Field-programmable logic arrayss

o Programmable read-only memorys

6. Modular Sequential Logic

o Memory devices (Flip-flops, registers etc.)

o Modules: Shift registers, counters, etc.

7. Analysis Synthesis and Simplification of Synchronous Sequential Circuits

o State machine representation

o State transition table

8. Asynchronous Sequential Circuits (Time permitting)

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Grade Structure and Policy

Course work

Grade distribution

Labs Assignment/Project

20%

Homework Assignments

15%

Two Midterm Examinations

40%

Final Examination

25%

· The lab grade is split into for 5% participation and 15% for two design projects. The grade distribution for the projects is 5% and 10%, respectively.

· Five homework assignments will be given. Each assignment contributes 3% to the final grade.

· No late submission of homework assignments will be accepted.

· Exams are closed-book and closed-notes. Two midterm exams are scheduled around the middle of March and April.

· UMBC rules apply to cheating/copying. You must do your own work and not copy from anyone else.

· Copying/cheating will result in a minimum punishment of a zero grade.

· Academic Integrity Statement: "By enrolling in this course, each student assumes the responsibilities of an active participant in UMBC's scholarly community in which everyone's academic work and behavior are held to the highest standards of honesty. Cheating, fabrication, plagiarism, and helping others to commit these acts are all forms of academic dishonesty, and they are wrong. Academic misconduct could result in disciplinary action that may include, but is not limited to, suspension or dismissal. To read the full Student Academic Conduct Policy, consult the UMBC Student Handbook, the Faculty Handbook, or the UMBC Policies section of the UMBC Directory."

Course grade

Range

A

90% - 100%

B

80% - 89.9%

C

70% - 79.9%

D

60% - 69.9%

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Lecture notes

Lecture

Date

Subject

1

January 31, 2022

Introduction and overview

2

February 2, 2022

Number Systems

3

February 7, 2022

Signed Number Representation

4

February 9, 2022

Fundamentals of Boolean Algebra

5

February 14, 2022

Computer Codes

6

February 16, 2022

Logic Gates

7

February 21, 2022

Switching Functions

8

February 23, 2022

Analyzing Switching Circuits

9

February 28, 2022

Synthesis of Combinational Circuits

10

March 2, 2022

Reduction of Combinational Logic

11

March 7, 2022

Karnaugh Maps

12

March 9, 2022

Tabular Method for Logic Minimization

13

March 14, 2022

Review

14

March 16, 2022

1^st Midterm examination

15

March 28, 2022

Designing With Digital Components

16

March 30, 2022

Designing With Digital Components (Cont.)

17

April 4, 2022

Programmable Logic Devices

18

April 6, 2022

Introduction to Sequential Devices

19

April 11, 2022

Introduction to Sequential Devices (Cont.)

20

April 13, 2022

Modular Sequential Logic

21

April 18, 2022

Counters Design

22

April 20, 2022

Review

23

April 25, 2022

2^nd Midterm examination

24

April 27, 2021

Analysis of Sequential Circuits

25

May 2, 2022

Synthesis of Synchronous Sequential Circuits

26

May 4, 2022

Optimization of Sequential Circuits Design

27

May 9, 2022

Optimization of Sequential Circuits Design (Cont.)

28

May 11, 2022

Design Examples

29

May 16, 2022

Review

30

May 25, 2022

Final Exam 1:00 PM -- 3:00 PM

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Homework Assignments

Assignment

Date Out

Due Date

Assignment #1

February 9, 2022

February 16, 2022

Assignment #2

February 23, 2022

March 2, 2022

Assignment #3

March 7, 2022

March 14, 2022

Assignment #4

April 6, 2022

April 13, 2022

Assignment #5

May 4, 2022

May 11, 2022

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Projects

Exercise

Date Out

Due Date

Project #1

March 4, 2022

March 18, 2022

Project #2

May 1, 2022

May 15, 2022

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Interesting Links

· Cool Java Applet that simulates electronic circuit made by Paul Falstad

· Digsim information page (Dr. Chang)

· Verilog Tutorial

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Last Revised: May 4, 2022

Course work	Grade distribution
Labs Assignment/Project	20%
Homework Assignments	15%
Two Midterm Examinations	40%
Final Examination	25%

Course grade	Range
A	90% - 100%
B	80% - 89.9%
C	70% - 79.9%
D	60% - 69.9%

Lecture	Date	Subject
1	January 31, 2022	Introduction and overview
2	February 2, 2022	Number Systems
3	February 7, 2022	Signed Number Representation
4	February 9, 2022	Fundamentals of Boolean Algebra
5	February 14, 2022	Computer Codes
6	February 16, 2022	Logic Gates
7	February 21, 2022	Switching Functions
8	February 23, 2022	Analyzing Switching Circuits
9	February 28, 2022	Synthesis of Combinational Circuits
10	March 2, 2022	Reduction of Combinational Logic
11	March 7, 2022	Karnaugh Maps
12	March 9, 2022	Tabular Method for Logic Minimization
13	March 14, 2022	Review
14	March 16, 2022	1^st Midterm examination
15	March 28, 2022	Designing With Digital Components
16	March 30, 2022	Designing With Digital Components (Cont.)
17	April 4, 2022	Programmable Logic Devices
18	April 6, 2022	Introduction to Sequential Devices
19	April 11, 2022	Introduction to Sequential Devices (Cont.)
20	April 13, 2022	Modular Sequential Logic
21	April 18, 2022	Counters Design
22	April 20, 2022	Review
23	April 25, 2022	2^nd Midterm examination
24	April 27, 2021	Analysis of Sequential Circuits
25	May 2, 2022	Synthesis of Synchronous Sequential Circuits
26	May 4, 2022	Optimization of Sequential Circuits Design
27	May 9, 2022	Optimization of Sequential Circuits Design (Cont.)
28	May 11, 2022	Design Examples
29	May 16, 2022	Review
30	May 25, 2022	Final Exam 1:00 PM -- 3:00 PM

Assignment	Date Out	Due Date
Assignment #1	February 9, 2022	February 16, 2022
Assignment #2	February 23, 2022	March 2, 2022
Assignment #3	March 7, 2022	March 14, 2022
Assignment #4	April 6, 2022	April 13, 2022
Assignment #5	May 4, 2022	May 11, 2022