CMPE 691: Advanced Topics - Configurable System Design
Spring 2018

Course Information

Course Readings/ Tutorials

Paper/Tutorial Comments
ISE 14.7 and configuration for Nexys FPGA board Instructions for creating projects in Xilinx ISE
counter example Download the file and generate the .bit file through xilinx ISE Project Navigator flow to program the Artix-7 FPGA.
A simple tutorial for Verilog module creation and Isim Simulator Verilog example files Eight_Bit_Mu ltiplier.v , Eight_Bit_Multiplier_ tb.v
 **VGA Rectangle on Artix  Initial code for showing a rectangle using VGA
Nexys4 Board with Artix-7 User Guide and UCF file You need to read this in order to know the FPGA pins locations for LED, switches and clock.
Quick reference for verilog Helpful and handy verilog reference.
Verilog according to Tom Helpful intro to verilog. Please also read the accompanying notes.
Isim Simulator Steps for running Isim simulator, with Verilog example files nand_latch.v , nand_latch_tb.v .
Isim Simulator User Manual Complete Xilinx user manual for Isim simulator .

Homework / Projects

All future dates tentative until hwk/project assigned.

Number Due Date % Hwk/proj grade Material covered and addiotional files
 1   Feb. 20,9 pm 7% Binary arithmetic and conversion, verilog, and multi-input adders, testbench template and result report example
 2   Mar 7th   2pm % State machine, and image color change and VGA imageRGB2BW.m picture_to_matrix.m parrot128.png
 3   Mar 30th , 2 pm 15% State machines, timing, slice count and power analysis, memory and state machine, FIFOs
 4   Phase 1 Apr. 20, % Binary arithmetic and conversion, verilog, and multi-input adders, related matlab files and test images sample analysis plots for report and presentation.

Course Topics and Lecture Slides

Future details are tentative.

Date Lecture Topics
Introduction Course introduction.
Design and Verilog Module Verilog Module
Sign Extension Number representation, sign extension
Blocking nonblocking statement >More Verilog Examples, Blocking nonblocking statement
Fixed-point Number Fixedpoint number reprsentation
Floating Point Floating point.
Numeric Basics Slides from reference book along with Verilog examples (covers numeric basics, Adders, Multi-input adder)
Verilog Testing Verilog testbench
More verilog examples Quiz example, Blocking non Blocking, arrhythmetic shift
Squaring Squaring.
Fixed Input Mults Multipliers.
Arithmetic logic Adder/Subtractor, Multiplier Circuits and Verilog implementation.
Sequential Basics Sequential Basics and Pipelining
Verilog 2 Register, reset and enable signals modeling in registers
State Machines State machines.
testbench for the sequential multiplier testbench for the sequential multiplier
Memories Overview of memories and implementation.
Memory Examples and FIFO Examples and FIFO.
FPGA Architectures FPGA Comparison with ASIC and DSP Implementation.
FPGA Design Flow FPGA device utilization, timing constraints, and memory.
Pipelining & Latency Pipelining & Latency
FPGAs 3 More on Timing Constraints, FFs and latches
ISE Synthesis and Place and Route Options ISE Synthesis and Place and Route Options
Xilinx Xpower Analyzer Overview of Xpower Analyzer
Xilinx IP Core Xilinx IP core generator
Notes on UART interface Xilinx UART interface
Xilinx Manual on UART Xilinx UART manual.
Serial interface Example for FFT Serial Transmission example design files Serial interface Example for FFT block diagram and design files for practice.
Deep learning Intro to Deep learning (source: Nvidia)
convolution image Convolution image filter
Convolutional networks Convolutional networks
KNN algorithm and simulation KNN algorithm, EEG database and simulation setup
fixedpoint conversion in matlab fixedpoint conversion in matlab.
Saturation Overview of Saturation in Verilog.
Rounding Overview of Rounding in Verilog.
K Nearest Neighbor Algorithm Introduction K nearest neighbor algorithm and an example.