Tinoosh Mohsenin
Associate Professor


Information Technology/ Engineering Building, ITE 323
University of Maryland, Baltimore County




410-455-3969 (fax)

Research Lab Website


Curriculum vitae (pdf)

In general, I am interested in high performance and energy-efficient hardware computation that support machine learning, digital signal processing, error correction and communication. These include:

  • Domain specific programmable many-core for wearable and communication platforms
  • Low power DSP fnd machine learning algorithms and hardware for personalized health monitoring and assistive devices
  • Deep learninig and convolutional neural network hardware accelerator for embedded applications
  • Algorithm and architecture enhancements
    • Compressive sensing reconstructon
    • Low density parity check codes (LDPC) error correction
  • Application mapping/software development on many-core architectures
  • FPGA and VLSI design of ASICs and reconfigurable architectures
  • Embedded CPU and GPU application mapping and analysis
  • Single-chip solutions targeted for low-power embedded systems through a co-design of programmable cores and application-specific processors.