# test instruction cache
puts "from  ecomp add32.e bshift.e part3a.e -o part3a.net"
puts "from  esim < part3a.run > part3a.out"
esim load part3a.net
# revised 11/11/99
# load up the instruction memory with 32 bit works
# lw 1,4(0)  instruction cache stall for 4 clocks
esim write -hex inst_mem.mr   0x0 32 80010004
# lw 2,24(0) instruction quick
esim write -hex inst_mem.mr  0x20 32 80020018
# lw 3,44(0) instruction quick
esim write -hex inst_mem.mr  0x40 32 8003002C
# lw 5,20(0) instruction quick
esim write -hex inst_mem.mr  0x60 32 80050014
# lw 4,8(0) instruction stall
esim write -hex inst_mem.mr  0x80 32 80040008
# sw 4,12(0) instruction quick
esim write -hex inst_mem.mr  0xA0 32 E004000C
# lw 2,256(0) instruction quick
esim write -hex inst_mem.mr  0xC0 32 80020100
# nop  just padding, note value
esim write -hex inst_mem.mr  0xE0 32 00000001
# nop  just padding, note value
esim write -hex inst_mem.mr 0x100 32 00000002
# nop  just padding, note value
esim write -hex inst_mem.mr 0x120 32 00000003
# nop  just padding, note value
esim write -hex inst_mem.mr 0x140 32 00000004
#
# load register zero with zero, hopefully safe from software bug that
# might change it
esim write -hex greg.mr  0x0 32 00000000
# load data memory with 32 bit words
esim write -hex dmem.mr   0x0 32 00112233
esim write -hex dmem.mr  0x20 32 11111111
esim write -hex dmem.mr  0x40 32 22222222
esim write -hex dmem.mr  0x60 32 33333333
esim write -hex dmem.mr  0x80 32 44444444
esim write -hex dmem.mr  0xA0 32 55555555
esim write -hex dmem.mr  0xC0 32 66666666
esim write -hex dmem.mr  0xE0 32 77777777
esim write -hex dmem.mr 0x100 32 88888888
esim write -hex dmem.mr 0x120 32 99999999
esim write -hex dmem.mr 0x140 32 AAAAAAAA
esim write -hex dmem.mr 0x160 32 BBBBBBBB
esim write -hex dmem.mr 0x180 32 CCCCCCCC
esim write -hex dmem.mr 0x1A0 32 DDDDDDDD
# stop just before the first clock in order to print
esim run 199
for {set i 28} {$i} {incr i -1} {
puts "inst=  [esim show -hex inst]  pc=   [esim show -hex pc]    at [esim curtime]ns."
puts "ir_s1= [esim show -hex ir_s1]  at clock [esim show cntr]"
puts "ir_s2= [esim show -hex ir_s2]  a_s2= [esim show -hex a_s2]  b_s2= [esim show -hex b_s2]  c_s2= [esim show -hex c_s2]"
puts "ir_s3= [esim show -hex ir_s3]  a_s3= [esim show -hex a_s3]  b_s3= [esim show -hex b_s3]"
puts "ir_s4= [esim show -hex ir_s4]  a_s4= [esim show -hex a_s4]  b_s4= [esim show -hex b_s4]\n"
# stop just before the clock in order to print
esim run 200
}
#
# dump registers and memory
# output some general registers
puts " General registers at end of simulation "
puts "greg 0- 3= [esim read -hex greg.mr  0x0 32] [esim read -hex greg.mr 0x20 32] [esim read -hex greg.mr 0x40 32] [esim read -hex greg.mr 0x60 32]"
puts "greg 4- 7= [esim read -hex greg.mr  0x80 32] [esim read -hex greg.mr 0xA0 32] [esim read -hex greg.mr 0xC0 32] [esim read -hex greg.mr 0xE0 32]"
puts "greg 8-11= [esim read -hex greg.mr  0x100 32] [esim read -hex greg.mr 0x120 32] [esim read -hex greg.mr 0x140 32] [esim read -hex greg.mr 0x160 32]"
puts "greg12-15= [esim read -hex greg.mr  0x180 32] [esim read -hex greg.mr 0x1A0 32] [esim read -hex greg.mr 0x1C0 32] [esim read -hex greg.mr 0x1E0 32]"
#
# more output, data memory
puts " Data Memory at end of simulation "
puts "dmem 0- 3= [esim read -hex dmem.mr  0x0 32] [esim read -hex dmem.mr 0x20 32] [esim read -hex dmem.mr 0x40 32] [esim read -hex dmem.mr 0x60 32]"
puts "dmem 4- 7= [esim read -hex dmem.mr  0x80 32] [esim read -hex dmem.mr 0xA0 32] [esim read -hex dmem.mr 0xC0 32] [esim read -hex dmem.mr 0xE0 32]"
puts "dmem 8-11= [esim read -hex dmem.mr  0x100 32] [esim read -hex dmem.mr 0x120 32] [esim read -hex dmem.mr 0x140 32] [esim read -hex dmem.mr 0x160 32]"
puts "dmem12-15= [esim read -hex dmem.mr  0x180 32] [esim read -hex dmem.mr 0x1A0 32] [esim read -hex dmem.mr 0x1C0 32] [esim read -hex dmem.mr 0x1E0 32]"
#
puts "part3a.out finished"