The Bumpy Road to Exascale: A Q&A With Thomas Sterling
HPC Wire (11/17/11)

Indiana University professor Thomas Sterling says in an interview
that an effort is underway to cultivate an international community
committed to the goal of developing a shared software stack for
exascale computing. He cites several issues that could be
problematic, one of which is a lack of clarity on the execution model
needed to steer the stack's development. Sterling prefers a
revolutionary approach for meeting exascale challenges, and notes
that "without a paradigm shift in the manner in which computation is
organized and conducted ... there will not be adequate efficiency or
scalability to fully employ systems capable of exaflops performance
by 2020." The second issue Sterling raises concerns how the work and
credit for bringing exascale computing about will be shared among
international stakeholders. He says at least three initiatives in
Europe, China, and Japan are focused on exascale development, and
points to meaningful international engagement as a critical factor in
making a future exascale approach workable. Sterling says that
"international discussions can begin to converge on a global strategy
of cooperation. But this will not work unless there is an overriding
execution model to which all parties can agree and to which all
component layers, wherever developed will be compliant."

Exascale Computing Seen in this Decade
Computerworld (11/16/11) Patrick Thibodeau

A major focus at the SC11 supercomputing conference is developing an
exascale computing system, which would be about 1,000 times more
powerful than any existing system. The U.S. Department of Energy
(DOE), which will fund the development of exascale systems, wants a
functional exascale computer by 2020 that will not use more than 20
megawatts (MW) of power. "We're in a power-constrained world now,"
says Nvidia's Steve Scott, who believes the DOE's 20 MW goal can be
achieved by 2022. "The performance we can get on a chip is
constrained not by the number of transistors we can put on a chip,
but rather by the power." To reach the required level of power
efficiency to develop an exascale system that runs on 20 MW, power
usage technology will have to be improved by a factor of 50,
according to Scott. Intel plans to meet the 20 MW exascale goal by
2018, says Intel's Rajeeb Hazra. However, before reaching the
exascale level, vendors will produce systems that can scale into the
hundreds of petaflops, such as IBM's Blue Gene/Q system, which is
capable of 100 petaflops.