// bmul8c.e parallel multiply 8 bit x 8 bit to 16 bit product
//          uses add8c.e component and fadd component

// the main components are bmul8c,
// a basic building block is 8 full adders is add8csa that uses fadd

define add8csa(b, a[8], sum_in[8], cin[8], sum_out[8], cout[8])
  // b is a multiplier bit 
  // a is the multiplicand
  // sum_in and sum_out are what their name implies
  // cin and cout are vectors here, not single bits

signal zero[8] <= #h00;
signal aa[8];
circuits
  aa <= a when b else zero after 1ns;
  add0 use fadd(aa[0], sum_in[0], cin[0], sum_out[0], cout[0]);
  add1 use fadd(aa[1], sum_in[1], cin[1], sum_out[1], cout[1]);
  add2 use fadd(aa[2], sum_in[2], cin[2], sum_out[2], cout[2]);
  add3 use fadd(aa[3], sum_in[3], cin[3], sum_out[3], cout[3]);
  add4 use fadd(aa[4], sum_in[4], cin[4], sum_out[4], cout[4]);
  add5 use fadd(aa[5], sum_in[5], cin[5], sum_out[5], cout[5]);
  add6 use fadd(aa[6], sum_in[6], cin[6], sum_out[6], cout[6]);
  add7 use fadd(aa[7], sum_in[7], cin[7], sum_out[7], cout[7]);
end circuits;
end add8csa;

// bmul8c.e   full combinatorial 8 X 8 = 16 bit unsigned multiplier
// b is multiplier input, a is multiplicand input, prod is output product

define bmul8c(a[8], b[8], prod[16])
signal zero[8] <= #h00;
signal s0[8];
signal s1[8];
signal s2[8];
signal s3[8];
signal s4[8];
signal s5[8];
signal s6[8];
signal s7[8];
signal s0s[8];
signal s1s[8];
signal s2s[8];
signal s3s[8];
signal s4s[8];
signal s5s[8];
signal s6s[8];
signal s7s[8];
signal c0[8];
signal c1[8];
signal c2[8];
signal c3[8];
signal c4[8];
signal c5[8];
signal c6[8];
signal c7[8];
signal nc1;
circuits

  ba0 use add8csa(b[0], a, zero, zero, s0, c0);    // special CSA stage
  s0s <= #b0.s0[7:1] after 1ns;                      // shift previous sum
  prod[0] <= s0[0] after 1ns;                        // extract product

  ba1 use add8csa(b[1], a, s0s,    c0, s1, c1);
  s1s <= #b0.s1[7:1] after 1ns;
  prod[1] <= s1[0] after 1ns;

  ba2 use add8csa(b[2], a, s1s,    c1, s2, c2);
  s2s <= #b0.s2[7:1] after 1ns;
  prod[2] <= s2[0] after 1ns;

  ba3 use add8csa(b[3], a, s2s,    c2, s3, c3);
  s3s <= #b0.s3[7:1] after 1ns;
  prod[3] <= s3[0] after 1ns;

  ba4 use add8csa(b[4], a, s3s,    c3, s4, c4);
  s4s <= #b0.s4[7:1] after 1ns;
  prod[4] <= s4[0] after 1ns;

  ba5 use add8csa(b[5], a, s4s,    c4, s5, c5);
  s5s <= #b0.s5[7:1] after 1ns;
  prod[5] <= s5[0] after 1ns;

  ba6 use add8csa(b[6], a, s5s,    c5, s6, c6);
  s6s <= #b0.s6[7:1] after 1ns;
  prod[6] <= s6[0] after 1ns;

  ba7 use add8csa(b[7], a, s6s,    c6, s7, c7);
  s7s <= #b0.s7[7:1] after 1ns;
  prod[7] <= s7[0] after 1ns;

  add use add8c(s7s, c7,    #b0,   prod[15:8], nc1);  // normal adder
end circuits;
end bmul8c;