CMPE 640: Custom VLSI Design |
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CMPE 640: Custom VLSI Design
Section 01 Fall 2021 Instructor: Chintan Patel Office: ITE 322 Office Hours: Mon & Wed, 5:30 PM - 6:30 PM or by appointment Teaching Assistants: Posted on CMPE 315 webpage Office Hours: Posted on CMPE 315 webpage Meeting Time and Location: Mon & Wed, SOND 109, 4:00 - 5:15 PM Lab Discussion: Thrs, ITE 375, 10:00 -11:50 AM Lab : Fri, ITE 375, 1:00 - 1:50 PM Announcements
Check regularly for important class information
Sep 1: Syllabus posted. Course Material
Syllabus: Fall 2021 syllabus Lecture 1: Introduction Lecture 2: CMOS Basics I Lecture 3: CMOS Basics II Lecture 4: Quality Metrics I Lecture 5: Quality Metrics II Lecture 6: Diode Details Lecture 7: MOS Transistor Details Lecture 8: MOS Transistor Details II Lecture 9: CMOS Fabrication I Lecture 10: CMOS Fabrication II Lecture 11: Process Variations Lecture 12: CMOS Scaling End of Midterm Exam Material Lecture 13: CMOS Inverter I Lecture 14: CMOS Inverter II Lecture 15: Combinational Logic Design I Lecture 16: Combinational Logic Design II Lecture 17: Combinational Logic Design III Lecture 18: Sequential Logic Design I Lecture 19: Sequential Logic Design II Lecture 20: Memory End of Course Material Labs
Refer to the Labs section on CMPE 315 webpage
Project
Refer to the Labs section on CMPE 315 webpage
Cadence
Refer to the Cadence section on CMPE 315 webpage
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