UMBC CMSC 313, Computer Organization & Assembly Language, Fall 2003, Section 0101
Flip Flops I
Tuesday 11/11, 2001
Assigned Reading in Murdocca & Heuring: A.11
Assigned Reading in Neveln:
- Slides are available in PDF:
- Higher dimensional Karnaugh maps (and why they are awkward).
- Quine-McCluskey tabular algorithm for circuit minimization.
- Introduction to Sequential Logic.
- An SR latch.
- Hazards & glitches and why we need clocks.
- A clocked S-R latch, a clocked D latch, and a master-slave D
Circuits in DigSim:
Following these links will launch the DigSim Java applet and
load the circuit described.
14 Nov 2003 12:27:14 EST
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