UMBC CMSC 313, Computer Organization & Assembly Language, Fall 2003, Section 0101
Circuits for Addition
Tuesday 10/28, 2001
Assigned Reading in Murdocca & Heuring: 3.5
Assigned Reading in Neveln:
- Slides are available in PDF:
- Design of a half adder and a full adder. Considered
the trade-offs between speed (lower propagation delay)
and size (number of gates).
- Using 4 full adders to construct a 4-bit ripple
- A 4-bit carry-lookahead adder.
- A combined adder/subtractor is possible for
two's complement numbers.
- Midterm exam returned and discussed.
Circuits in DigSim:
Following these links will launch the DigSim Java applet and
load the circuit described.
14 Nov 2003 10:14:45 EST
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