# Finite State Machine Design

#### Tuesday 11/26, 2002

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Assigned Reading in Murdocca & Heuring:

Assigned:

Due:

Topics Covered:

• State Reduction. Went over an algorithm for reducing the number of states in a finite state machine. The algorithm shown is not the same as the one in the textbook. We create a 2-dimensional with an entry for each pair of states. Two states are "distinguished" if:
1. States X and Y of a finite state machine M are distinguished if there exists an input r such that the output of M in state X reading input r is different from the output of M in state Y reading input r.
2. States X and Y of a finite state machine are distinguished if there exists an input r such that M in state X reading input r goes to state X', M in state Y reading input r goes to state Y' and we already know that X' and Y' are distinguished states.

The state reduction algorithm makes passes through all pairs of states (X,Y) that we have not already found to be distinguished. For each pair (X,Y), we check if X and Y are distinguished using the definition above. If no new distinguished pairs are found during a pass, then the algorithm terminates. At the end of the algorithm, states that are not found to be distinguished are in fact equivalent. (The proof of this "fact" is usually given in an Automata Theory class like CMSC 451. Though not hard, we'll dispense with the proof here.) Equivalent states can be combined to form an equivalent finite state machine with fewer states.

The finite state machine constructed in this manner has the smallest number of states possible. (Another fact proven in CMSC 451.)

• The state reduction algorithm given above takes O(n4) time for a finite state machine with n states because there are O(n2) pairs of states and we make at most O(n2) passes. (During each pass other than the final pass, at least one pair of states is found to be distinguished. So, there cannot be more than n2 passes.) A more clever implementation of the algorithm will result in an O(n2) running time.
• After reducing the number of states in a finite state machine, we must still assign a unique bit pattern to each state. This is the state assignment problem. We went over an example where using a different state assignment leads to a much simpler combinational circuit for a finite state machine. Unfortunately, there's no way to find the "best" state assignment other than trying all n! possibilities. Instead, people follow heuristics ("rules of thumb") to solve the state assignment problem.

Some heuristics for the state assignment problem (from Digital Design: Principles and Practices 2/e, John F. Wakerly, Prentice-Hall, 1994).

• The initial state should be simple for the reset operation --- i.e., all zeroes or all ones.
• Minimize the number of state variables that change on each transition.
• Maximize the number of state variables that don't change on each transition.
• Exploit symmetries in the state diagram.
• If there are unused states (when the number of states s is not a power of 2), choose the unused state variable combinations carefully. (Don't just use the first s combination of state variables.)
• Decompose the set of state variables into bits or fields that have well-defined meaning with respect to the input or output behavior.
• Consider using more than the minimum number of states to achieve the objectives above.
• We discussed excitation tables and how to implement a finite state machine using J-K flip-flops. Sometimes using a J-K flip-flop instead of a D flip-flop results in a smaller circuit. This is because the excitation table for J-K flip-flops has many "don't cares". However, the additional cost for wiring the 2 inputs for each J-K flip-flop (instead of 1 input for a D flip-flop) has made D flip-flops more popular, because the cost of wiring is a significant consideration in many applications.