UMBC CMSC 313, Computer Organization & Assembly Language, Fall 2002, Section 0101
Finite State Machines
Thursday 11/14, 2002
Assigned Reading in Murdocca & Heuring: A.12-A.15
Assigned Reading in Neveln:
- Recap SR latches, D latches, master-slave D flip-flops.
- Examined a race condition that might occur while putting
together a master-slave D flip-flop.
- Examined a negative edge triggered D flip-flop.
- Introduction to finite state machines.
- Constructed a Mod-4 counter.
- Discussed DigSim Exercise 2.
Noted that D flip-flops in DigSim are positive edge triggered.
Circuits in DigSim:
Following these links will launch the DigSim Java applet and
load the circuit described.
14 Nov 2003 10:22:59 EST
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