UMBC CMSC 313, Computer Organization & Assembly Language, Fall 2002, Section 0101

Circuits for Addition

Tuesday 11/05, 2002

Up]

Assigned Reading in Murdocca & Heuring:  3.5

Assigned Reading in Neveln:   

Assigned:   

Due:   

Topics Covered:

• Discussed Homework 3
• Circuit diagram for a half-adder constructed from a Sum-Of-Products Boolean formula and also using XOR gates.
• Circuit diagram for a full-adder constructed from a Sum-Of-Products Boolean formula, using XOR gates and using two half-adders.
• Propagation delays.
• A 4-bit ripple-carry adder constructed using 4 full adders.
• A combined 4-bit adder/subtracter. (This really works even when you try (-2) - (-8) = 6 without triggering an overflow.)
• A carry-lookahead adder.