UMBC CMSC 313, Computer Organization & Assembly Language, Fall 2002, Section 0101
Circuits for Addition
Tuesday 11/05, 2002
Assigned Reading in Murdocca & Heuring: 3.5
Assigned Reading in Neveln:
- Discussed Homework 3
- Circuit diagram for a half-adder constructed from
a Sum-Of-Products Boolean formula and also using XOR gates.
- Circuit diagram for a full-adder constructed from
a Sum-Of-Products Boolean formula, using XOR gates and
using two half-adders.
- Propagation delays.
- A 4-bit ripple-carry adder constructed using
4 full adders.
- A combined 4-bit adder/subtracter. (This really
works even when you try (-2) - (-8) = 6 without triggering
- A carry-lookahead adder.
14 Nov 2003 10:22:47 EST
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