UMBC CMSC 313, Computer Organization & Assembly Language, Fall 2001, Section 0101

Homework Assignments

Homework assigned so far:

Homework 1 (due Tues 9/11)

From Murdocca & Huering Chapter 2, page 56.
  1. Problem 2.2, parts (a) thru (e)
  2. Problem 2.4
  3. Problem 2.6
  4. Problem 2.14, part (a) only
  5. Problem 2.15

Homework 2 (due Tues 9/18)

From Murdocca & Huering Chapter 2, page 56.
  1. Problem 2.13
  2. Problem 2.18, parts (a) and (b)
  3. Problem 2.19, part (a) only.
From Murdocca & Huering Chapter 3, page 95.
  1. Problem 3.1
  2. Problem 3.2
  3. Problem 3.3
  4. Problem 3.4

Homework 3 (due Tues 11/20)

  1. From Murdocca & Huering Appendix A, pages 493-495, problems A.3, A.6, A.8, A.10, A.12, A.13 and A.14.
  2. The carry out from a full adder can be implemented directly from the equation Co = M( a, b, cin ), where M is the majority function on 3 variables. It can alternatively be implemented using two half adders and an OR gate as shown in class. Show that the logical expressions for the carry out from the full adder are the same for the two implementations.
  3. Write Boolean expressions for the borrow and difference outputs from a full subtractor as shown on page 66 of Murdocca and Heuring.

Homework 4 (due Tues 12/04)

  1. Problems in Appendix A of Murdocca and Heuring: A.20, A.21, A.29, A.30 and A.34 (part a only).

    Note: For problem A.29, assume there is a clock and that the inputs only change synchronously with the clock. Your solution may use a MUX or may use other standard gates.

  2. Use DigSim to simulate and observe the operation of the 2 bit modulo 4 counter. Launch DigSim for Question 2.
  3. Use DigSim to simulate and observe the operation of the circuit below. What is (are) the patterns of button pushes of the buttons A and B that cause the LED to light? Launch DigSim for Question 3.
  4. Use DigSim to design a clocked sequential circuit that has 2 binary outputs that cycle through the four-long sequence 00, 01, 11, 10, ...
Additional instructions on using DigSim for Homework 4 has been posted.

Homework 5 (due Tues 12/11)

  1. Problems in Appendix B of Murdocca and Heuring: B.1, B.2, B.8, and B.15.
  2. Use DigSim to design a 3-bit mod 6 counter that outputs the sequence 000, 001, 010, 011, 100, 101, 000, ... Save your schematic and submit it using the Unix 'submit' command under 'hw5'.

Last Modified: 4 Dec 2001 09:50:37 EST by Richard Chang
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