My research interests include efficient algorithms and hardware design targeting FPGAs, ASICs and Many-core platforms. I am particularly interested in machine Learning and DSP algorithm design and implementations, Compressive Sensing algorithms and hardware and application mapping on manycore platforms.
I have gained a good set of hardware and software skills during my PhD study and also have additional 2 years of experience in industry working on FPGA and VLSI system design using Verilog /VHDL RTL coding. At UMBC, I am currently working on a variety of projects including algorithm enhancement for compressive sensing reconstruction, reconfigurable hardware implementation for OMP Compressive Sensing, embedded low power many-core design and application characterization. I am very interested in expanding my knowledge to other fields such as hardware security and reliability and conduct state-of-the-art research in your group.