First: You must have an account on a GL machine. Every student and faculty should have this. Either log in directly to cadence1.cs.umbc.edu or Use ssh cadence1.cs.umbc.edu Be in your login directory, else some files need changing. You can copy many sample files to your working directory using: cp /afs/umbc.edu/users/s/q/squire/pub/download/cs411.tar . There are many files available. Next: Follow instructions exactly or you figure out a variation. 1) Get this tar file into your home directory (on /afs i.e. available on all GL machines.) cs411.tar and then type commands: cp /afs/umbc.edu/users/s/q/squire/pub/download/cs411.tar . tar -xvf cs411.tar cd vhdl mv Makefile.cadence Makefile tcsh source vhdl_cshrc make more add32_test.out make clean # saves a lot of disk quota Then do your own thing with Makefile for other VHDL files 2) The manual, step by step method (same results as above) Be in your home directory. mkdir vhdl # for your source code .vhdl .vhd cd vhdl mkdir vhdl_lib # your WORK library, keep hands off You now need to get the following 6 files into you vhdl directory: vhdl_cshrc cds.lib change $HOME to your path if needed hdl.var Makefile.cadence for first test add32_test.vhdl for first test add32_test.run for first test Make the following modification to cds.lib : Edit and replace $HOME with the specific path to your home if needed directory. e.g. /home/grad4/auser12 mv Makefile.cadence Makefile # Run the test run: source vhdl_cshrc make # should be no error messages more add32_test.out # it should have VHDL simulation output make clean You are on your own to write VHDL and modify the Makefile. Remember each time you log on: cd vhdl tcsh source vhdl_cshrc make # or do your own thing. The above is the latest generation Cadence "ncvhdl, nceval, ncsim"
You can download a free VHDL system form ghdl.free.fr Follow the instructions for Windows, Linux or MAC OSX We have tried to get the Linux version onto linux.gl.umbc but have been unsucessful, it has been installed on personal Linux machines using root password and installing into /usr/local tree. The Windows version is a little different, yet it works. For CMSC 411, you need to do a little extra because GHDL does not default with some IEEE packages we use. Using GHDL on your home PC in windows: Download GHDL from ghdl.free.fr/download.html click on "installer" After installing, control panel -> system -> advanced -> environment variables -> user variables, path, edit Add to your user path ;C:\"program files"\Ghdl\bin From a Command prompt window type or use add32_test.bat rem use GHDL to analyze, elaborate and run add32_test.vhdl ghdl -a --ieee=synopsys add32.vhdl ghdl -a --ieee=synopsys add32_test.vhdl ghdl -e --ieee=synopsys add32_test ghdl -r --ieee=synopsys add32_test --stop-time=160ns > add32_test.out Look at file add32_test.out with your favorite editor. The 160ns is found in the file add32_test.run On Ubuntu, sudo apt-get install ghdl to install ghdl. A Makefile_ghdl compiles first test and HW4 add32 and part1_start. You can do project with this ghdl. The "diff" command on Windows is "fc", ignore the few lines at beginning and end of comparison of .chk files.
First: Read Appendix H of Ashenden's book, p723 The steps are: load the CD, make a registration file, EMail the file, get back a license file, download the VHDL analyzer/compiler and simulator. Then: Follow the Quick Start Guide on page 728.
The following eight PostScript files provide an introduction to VHDL
The above is by Peter Ashenden who now has an updated version out as books: "The Student's Guide to VHDL" ISBN 1-55860-520-7 and "The Designer's Guide to VHDL" second edition ISBN 1-55860-674-2 Examples of VHDL from Ashenden's Designer's Guide are here
This is how I downloaded and installed a free VHDL compiler and simulator on Windows and Linux systems. It is not 100% compatible with Cadence, Cadence allows a few non standard constructs, but it works on many circuits and features. Using browser: www.symphonyeda.com/proddownloads.htm Choose Windows ~9.3MB or Linux ~9.3MB Execute the Windows file, choose 'setup' and follow instructions untar the Linux version and follow instructions For CMSC 411 the project check files are .chks for this VHDL.
The following four PostScript files provide Francis Bruno's introduction to VHDL
The following four PostScript files plus index and .tar.gz files provide Francis Bruno's VHDL project.
The following PostScript file provides an introduction to VHDL and instructions for compiling and simulating using vcomp/vsim.
You can get working chips from VHDL using synthesis tools. One of the quickest ways to get chips is to use FPGA's, Field Programmable Gate Arrays. The two companies listed below provide the software and the foundry for you to design your own integrated circuit chips: www.altera.com www.xilinx.com Complete Computer Aided Design, CAD, packages are available from companies such as Cadence, Mentor Graphics and Synopsis.
Draft 2000/D3 HERE
Last updated 2/5/09