YEAR 2002
Signal Analysis Under Real Process and Test Hardware Models : Abhishek Singh, Jim Plusquellic and Anne Gattiker
IEEE VLSI Test Symposium, April 2002.
A Current Ratio Model for Defect Diagnosis using Quiescent Signal Analysis: Chintan Patel, Ernesto Staroswiecki, Dhurva Acharyya, Smita Pawar, and Jim Plusquellic
IEEE VLSI Test Symposium, April 2002.
Comparison of Initial Cell Search Algorithms for 3GPP W-CDMA Systems using Cyclic and Comma-Free Codes : Sanat Kamal Bahl, Jim Plusquellic and Joseph Thomas
IEEE Midwest Symposium on Circuits and Systems, August 2002.
YEAR 2001
Power Supply Transient Signal Integration Circuit: Chintan Patel, Fidel Muradali and Jim Plusquellic,
International Test Conference, Oct 2001.
Detecting Delay Faults using Power Supply Transient Signal Analysis : Abhishek Singh, Chintan Patel,Shirong Liao, Anne Gattiker and Jim Plusquellic
International Test Conference, Oct 2001.
Custom Hardware Circuit for Power Supply Transient Signal Analysis: Chintan Patel, Fidel Muradali and Jim Plusquellic
Electronics Letters, March 2001.
A Process and Technology-Tolerant IDDQ Method for IC Diagnosis: Chintan Patel and Jim Plusquellic
VLSI Test Symposium, pp. 145-150, April 2001.
YEAR 2000
IC Diagnosis Using Multiple Supply Pad IDDQs:Ying Ouyang and Jim Plusquellic
IEEE Design and Test, Special Issue on Diagnosis, Oct 2000.
Quiescent Signal Analysis for IC Diagnosis: Jim Plusquellic, Chintan Patel, and Ying Ouyang
2000 System Test and Diagnosis Workshop at ITC 2000 , Oct 2000.
Real-Time Hardware Decision Circuit for Transient Signal Analysis: Chintan Patel and Jim Plusquellic 2000
Rejected: the IEEE International Test Conference , Oct 2000
Predicting Device Performance From Pass/Fail Transient Signal Analysis Data: Jim Plusquellic, Amy Germida, Jonathan Hudson, Ernesto Staroswiecki, Chintan Patel
International Test Conference pp. 1070-1079, Oct 2000.
Detection of CMOS Defects Under Variable Processing Conditions : Amy Germida and Jim Plusquellic
VLSI Test Symposium pp.195-201, April 2000
YEAR 1999
8-bit Multiplier Simulation Experiments Investigating the Use of Power Supply Transient Signals for the Detection of CMOS Defects :J.Plusquellic, A.Germida, Z.Yan International Symposium of Defect and Fault Tolerance in VLSI Systems pp. 68-76, November 1999
Defect Detection using Power Supply Transient Signal Analysis: Amy Germida, Zheng Yan, James F. Plusquellic and Fidel Muradali
International Test Conference pp. 67-76, September 1999
YEAR 1998
An Automated Technique to Identify Defective CMOS Devices based on Linear Regression Analysis of Transient Signal Data : J. F. Plusquellic, D. M. Chiarulli, and S.P. Levitan
International Workshop on IDDQ Testing , November 1998
Characterization of CMOS Defects using Transient Signal Analysis :James F. Plusquellic, Donald M. Chiarulli, and Steven P. Levitan
International Symposium on Defect and Fault Tolerance in VLSI Systems pp. ?, November 1998
Defect Detection Using Regression Analysis of Transient Signal Data.: James F. Plusquellic, Donald M. Chiarulli, and Steven P. Levitan
Transactions on Computer Aided Design , May 1998
YEAR 1997
Identification of Defective CMOS Devices using Correlation and Regression Analysis of Frequency Domain Transient Signal Data :J. Plusquellic, D. Chiarulli, S.Levitan International Test Conference pp. 40-49, November 1997
Time and Frequency Domain Transient Signal Analysis for Defect Detection in CMOS Digital ICs: James F. Plusquellic, Donald M. Chiarulli, and Steven P. Levitan
Transactions on Circuits and Systems November 1997
YEAR 1996
Digital Integrated Circuit Testing using Transient Signal Analysis : James F. Plusquellic, Donald M. Chiarulli, and Steven P. Levitan
International Test Conference pp. 481-490, October 1996
YEAR 1995
Digital IC Device Testing by Transient Signal Analysis : J. F. Plusquellic, D. M. Chiarulli, and S. P. Levitan
Electronics Letters 31(18):1568-1570, August 1995
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