Exam 3 Review Questions

Picture ID is REQUIRED for all exams

Use the list of questions below as a guide when studying for Exam 3. It is by no means a comprehensive list of questions.

You are responsible for all material presented in lecture. You are also responsible for all associated reading assignments and material covered by practice and homework problems in the text.

Note the exam 3 covers only the material since Exam 2. Students are permitted to bring one 8 1/2 x 11 piece of paper to the exam.

DO NOT EXPECT to see these specific questions on your exam (but you might).

Please note that code examples in the text are available from the textbook student site for you to copy, compile, edit, and experiment.

Note that textbook reference are for the 2nd edition of the text. If you are using the first edition, please see the Exam Review page for Spring 2010 for section numbers and practice problems.

    Memory Hierarchy (Text Section 6.1 - 6.3)
  1. Practice Problem 6.2 - calculating disk capacity
  2. Practice Problem 6.3 - calculating disk access time
  3. Practice Problem 6.8 - permuting loops to increase locality
  4. Practice Problem 6.9 - ranking functions in increasing degree of locality
  5. Define the following terms related to disk storage
    1. access time
    2. cylinder
    3. rotational latency
    4. read head
    5. sector
    6. seek time
    7. track
    8. transfer time
  6. What is meant by the terms "spatial locality" and "temporal locality". How might these concepts affect your code?
  7. Define the following terms related to random access memory (RAM)
    1. static RAM
    2. dynamic RAM
    3. memory module
    4. DIMM
    5. SIMM
    6. volatile memory
  8. Draw appropriate diagrams that show how one byte of memory is retrieved from a 64-Mbit 8 x 8 DRAM chip.
  9. Define the following terms related to the "memory hierarchy"
    1. cache
    2. cache miss
    3. cache hit
  10. What is meant by the statement "In the memory hierarchy for each k, the faster and smaller storage dveice at level k serves as a cache for the larger and slower storage device at level k + 1?"
    11. Processor Architecture (4.1, parts of 4.2, 4.3)
  11. What are the six stages of instruction execution? What action does each stage perform when executing an instruction? What hardware unit(s) are associated with each stage?
  12. Describe the specific actions performed by each stage of instruction execution for each Y86 instruction.
  13. What is the register file? How are values read from and written to the register file?
  14. Define ISA. In what way is an ISA an abstraction?
  15. As in project 6, given an IA32 instruction, write the equivalent sequence of Y86 instructions.
  16. What is the purpose of the Y86 assembler instructions below
    1. .pos
    2. .align
    3. .long
  17. Given a circuit diagram such as Figure 4.10 on page 354, determine the output of the circuit
  18. Given a set of inputs, design a simple circuit that yields the specified output.
  19. What is the ALU ? How is the ALU controlled?
    20. What is a bit multiplexor?
  20. Practice Problem 4.6
  21. Practice Problem 4.7
  22. Practice Problem 4.11
  23. Practice Problem 4.12
  24. Practice Problem 4.13
  25. Practice Problem 4.14
  26. Practice Problem 4.15
  27. Practice Problem 4.16
  28. Homework Problem 4.43
  29. Homework Problem 4.44
  30. Homework Problem 4.47
  31. Homework Problem 4.48
    32. Introduction to Virtual Memory (9.1 - 9.5)
  32. Define the following terms
    1. physical memory
    2. physical addressing
    3. virtual address
    4. address translation
    5. address space
    6. physical page
    7. virtual page
    8. page table
    9. page fault
    10. page hit
    11. MMU
    12. demand paging
  33. Describe the basic idea behind VM.
  34. What are the advantages of VM?
  35. Describe how VM is used as a tool for caching.
  36. Describe how VM is used as a tool for memory management.
  37. Describe how VM is used as a tool for memory protection.
  38. Describe the process by which a page fault is handled.
  39. Describe how VM allows multiple processes (programs) to share the same memory.
  40. Practice Problem 9.1
  41. Practice Problem 9.2