Arithmetic Functions

The computer was invented to do arithmetic! We have witnessed the computers going from 8-bit to 16-bit to 32-bit to 64-bit and the 128-bit computers are coming. One of the secrets to this is that if we can to it in one size, we can simply scale things up.

Iterative Circuit

When we want to have a circuit that will do something, we figure out how do it with one bit and then we re-use the design the proper number of times to get to the size we want. When we get the first one, it is called a cell. From that, we get an array of cells. If we want a circuit to design a 32-bit adder, we have 32 of the one bit adders.

Half Adder (HA)

Speaking of adders, we can build a circuit that will add two one-bit inputs. From this, we need to have a sum and a carry. The inputs are X and Y. The outputs are Sum (S) and Carry (C). The truth table looks like this:

Inputs		Outputs
X	Y	C	S
0	0	0	0
0	1	0	1
1	0	0	1
1	1	1	0

Full Adder (FA)

The problem with the half adder is that there is no input carry, which is necessary if we are adding up more than one column. For that, there is the full adder. The input carry (Z) must be included in to the design. The truth table for this is

Inputs Outputs

X Y Z C S

0 0 0 0 0

0 0 1 0 1

0 1 0 0 1

0 1 1 1 0

1 0 0 0 1

1 0 1 1 0

1 1 0 1 0

1 1 1 1 1

Inputs		Outputs
X	Y	Z	C	S
0	0	0	0	0
0	0	1	0	1
0	1	0	0	1
0	1	1	1	0
1	0	0	0	1
1	0	1	1	0
1	1	0	1	0
1	1	1	1	1

Now we are good to go. We can add two input bits and a carry. That by itself is real useful!

4 Bit Ripple Carry Adder

Ok, how can we do something useful? The answer is an iterative circuit, where there is one cell for each column of bits. We can have one half adder cell and n-1 full adder cells, or n cells, where we make sure that there is no carry applied to the least significant cell. (We can ground the input carry so that we know it is a zero.) We can have four, eight, sixteen, thirty-two, or sixty-four cells. Now that is useful. But there is a problem with that design.

The carry is computed in cell₀ and sent to cell₁ which computes the next carry that is sent to cell₂ .... and on and on. If the propagation delay in the first cell (it is not, but for the sake of simplicity, assume it is) is one clock cycle, then to do a 32-bit add will take 32 clock cycles. Each column needs to know the carry before it can accurately do the addition, so we need to make the carry available sooner.

Carry Look Ahead Adder

The following diagram is the full adder (flipped from when we saw it above), and the carry portion comes out.

In the following diagram we can have circuitry added that will give us the look-ahead capability that we need to speed things up. The P stands for propagate and the G stands for generate.

The new circuitry is more expense to build, but allows the operation to be performed faster. In this case speed is the more desirable characteristic.

Adder-Subtractor

There are ways to build a subtractor, which could also require a complementor. Then we can put that into a bigger circuit with a large and complex design. We can reduce the amount of hardware by combining things, such as in an adder-subtractor.

2-Bit By 2-Bit Multiplier

Binary multiplication is similar in concept to decimal multiplication. The multiplicand is multiplied by each bit of the multiplier. We start from the least significant bit, as in decimal. Each such multiplication forms a partial product and successive multiplication is shifted one bit to the left. The final product is the sume of the partial products. Looking at a 2 bit by 2 bit multiplication of input values A₁A₀ by B₁A₀ would be done with the following circuit and give us the result of C₃C₂C₁C₀. When writing assembly language multiplication instructions, using the mul, you can see why the multiplier and multiplicand have to be the same size (n) and the product is twice as big ( 2n).

Other Functions

We have looked at the binary add (half and full), binary subtraction, and binary multiplication, all unsigned integers. There are also incrementing, decrementing, division, operations with constants, comparisons, all in signed and unsigned versions. All of them are created by using an iterative array of 1-bit cells. Those are large and complex, and there is another method, called contraction, that can be used to simplify the design.