As you can see there are some number (n) of inputs and some number (m) of outputs. What happens in the block can be described using a truth table where each input is given with the resulting output for that set of inputs. It takes m expressions, one for each output.
Logic and Computer Design Fundamentals, 3rd Ed., Mano and Kime, Prentice Hall, 2004, Page 90
Another way to diagram this is:
Logic and Computer Design Fundamentals, 3rd Ed., Mano and Kime, Prentice Hall, 2004, Page 91
As you can see, the principles of top-down design and functional decomposition apply to hardware as well as software. The other software principle here is reuse, by instantiating a good design again and again.
As an example, suppose we have an AND gate with a standard load of 6 but we need to drive 8 other gates. What we can do is amplify the signal with a buffer. In this case the buffer must have a standard load of at least 3. That would look like this:
Decimal Digit | BCD Input | Excess-3 Output | |||||||
---|---|---|---|---|---|---|---|---|---|
A | B | C | D | W | X | Y | Z | ||
0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | |
1 | 0 | 0 | 0 | 1 | 0 | 1 | 0 | 0 | |
2 | 0 | 0 | 1 | 0 | 0 | 1 | 0 | 1 | |
3 | 0 | 0 | 1 | 1 | 0 | 1 | 1 | 0 | |
4 | 0 | 1 | 0 | 0 | 0 | 1 | 1 | 1 | |
5 | 0 | 1 | 0 | 1 | 1 | 0 | 0 | 0 | |
6 | 0 | 1 | 1 | 0 | 1 | 0 | 0 | 1 | |
7 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | |
8 | 1 | 0 | 0 | 0 | 1 | 0 | 1 | 1 | |
9 | 1 | 0 | 0 | 1 | 1 | 1 | 0 | 0 | |
10 | 1 | 0 | 1 | 0 | X | X | X | X | |
11 | 1 | 0 | 1 | 1 | X | X | X | X | |
12 | 1 | 1 | 0 | 0 | X | X | X | X | |
13 | 1 | 1 | 0 | 1 | X | X | X | X | |
14 | 1 | 1 | 1 | 0 | X | X | X | X | |
15 | 1 | 1 | 1 | 1 | X | X | X | X |
NOTE:The last six input values are don't-care conditions because they are not possible and that have no output.