CMSC 611

HW #2

Assigned: 15 September 1998

Due: 24 September 1998, 5:45 PM (in class)

  1. Problem 2.1 from the text.
  2. The PowerPC chip (used in the Macintosh) includes an addressing mode that updates the index register for a load or store with the memory address computed by the instruction. This allows the instruction sequence
    LOAD R5, 4(R4)
    ADD R4, R4, #4
    to be replaced with
    LOADX R5, 4(R4)
    by updating R4 to R4+4 as well as performing the load. This new addressing mode does not affect the CPI, but might affect the instruction count and/or the clock speed. Assume the instruction frequencies are those for gcc in Figure 2.26. Also, assume the CPI values are those listed in Problem 4.
    Including this instruction decreases the clock speed from 500 MHz to 450 MHz. What fraction of LOAD & STORE instructions must be replaced by LOADX & STOREX for the CPU speed to remain the same? Remember that converting a LOAD or STORE instruction to LOADX or STOREX reduces the instruction count by eliminating an ADD.
  3. Do problem 2.3 from the text, but use the following code sequence instead of the one listed in the book:
    A = B + C + D
    E = D + C + F
  4. Compute the effective CPI for DLX. You've measured the following average CPI for each instruction class:
    Instruction class Clock cycles
    ALU instructions & FP move 0.8
    Loads (integer or FP) 1.7
    Stores (integer or FP) 1.0
    Conditional branches (taken) 2.2
    Conditional branches (not taken) 0.6
    Jumps 1.6
    FP add, subtract, compare 2.1
    FP multiply 2.5
    FP divide 4.8
    Other FP 5.5

    Assume that branches are taken 70% of the time and that miscellaneous integer instructions take the same time as ALU instructions.
    1. What is the effective CPI for gcc, using the instruction frequencies in Figure 2.26?
    2. What is the effective CPI for ear, using the instruction frequencies in Figure 2.27?
    3. If the FP unit were removed from DLX and each FP operation were replaced with one or more integer instructions, how would this affect the CPI for ear? How would it affect execution time for ear? Don't compute an exact answer; instead, comment on what would be likely to happen.
  5. Problem 2.12 from the text.

Last updated 15 Sep 1998 by Ethan Miller (