puts "from  ecomp add32.e bshift.e part2.e -o part2.net"
puts "from  esim < part2a.run > part2a.out"
esim load part2.net
# test stall beq-lw  beq-add  add-lw
# revised 4/13/99
# load up the instruction memory with 32 bit works
# beq 0,0(1)  should act like a nop
esim write -hex inst_mem.mr   0x0 32 04000001
# lw 1,4(0)  branch slot, should be executed
esim write -hex inst_mem.mr  0x20 32 80010004
# lw 2,8(0)  should get executed (once)
esim write -hex inst_mem.mr  0x40 32 80020008
# beq 2,2(2)  should stall for two clocks, then branch 
esim write -hex inst_mem.mr  0x60 32 04420002
# lw 3,0xC(0) branch slot, should get executed
esim write -hex inst_mem.mr  0x80 32 8003000C
# lw 4,0x10(0) should not get executed
esim write -hex inst_mem.mr  0xA0 32 80040010
# add 5,3,4 should  get executed 
esim write -hex inst_mem.mr  0xC0 32 10C42800
# beq 5,5(2) should get executed
esim write -hex inst_mem.mr  0xE0 32 04A50002
# beq 0,1(3)  should get executed but not branch
esim write -hex inst_mem.mr 0x100 32 04010003
# ai 2,0(2)  not executedexecuted
esim write -hex inst_mem.mr 0x120 32 C0020002
# lw 7,28(0) should get executed
esim write -hex inst_mem.mr 0x140 32 8007001C
# sub 7,7,7  zero register 7
esim write -hex inst_mem.mr 0x160 32 10E73802
# ai 7,-4
esim write -hex inst_mem.mr 0x180 32 C007FFFC
# lw 7,32(7)  reg 7 has -4 so address will be 28
esim write -hex inst_mem.mr 0x1A0 32 80E70020
# add 7,7,7  be sure to use correct value for reg 7
#            this is a stall then data forward
esim write -hex inst_mem.mr 0x1C0 32 10E73800
# nop  just padding (low order bits for tracing)
esim write -hex inst_mem.mr 0x1E0 32 00000001
# nop  just padding
esim write -hex inst_mem.mr 0x200 32 00000002
# nop  just padding
esim write -hex inst_mem.mr 0x220 32 00000003
# nop  just padding
esim write -hex inst_mem.mr 0x240 32 00000004
# nop  just padding
esim write -hex inst_mem.mr 0x260 32 00000005
#
# load register zero with zero, hopefully safe from software bug that
# might change it
esim write -hex greg.mr  0x0 32 00000000
# load data memory with 32 bit words
esim write -hex dmem.mr   0x0 32 00112233
esim write -hex dmem.mr  0x20 32 11111111
esim write -hex dmem.mr  0x40 32 22222222
esim write -hex dmem.mr  0x60 32 33333333
esim write -hex dmem.mr  0x80 32 44444444
esim write -hex dmem.mr  0xA0 32 55555555
esim write -hex dmem.mr  0xC0 32 66666666
esim write -hex dmem.mr  0xE0 32 77777777
esim write -hex dmem.mr 0x100 32 88888888
# stop just before the first clock in order to print
esim run 199
for {set i 23} {$i} {incr i -1} {
puts "inst = [esim show -hex inst ]  pc=      [esim show -hex pc]  at [esim curtime]ns  cntr=[esim show cntr]"
puts "ir_s1= [esim show -hex ir_s1]  a_to_s2= [esim show -hex a_to_s2]  b_to_s2= [esim show -hex b_to_s2]"
puts "ir_s2= [esim show -hex ir_s2]  a_s2=    [esim show -hex a_s2]     b_s2= [esim show -hex b_s2]  c_s2= [esim show -hex c_s2]"
puts "ir_s3= [esim show -hex ir_s3]  a_s3=    [esim show -hex a_s3]     b_s3= [esim show -hex b_s3]"
puts "ir_s4= [esim show -hex ir_s4]  a_s4=    [esim show -hex a_s4]     b_s4= [esim show -hex b_s4]  waiting=[esim events]\n"
# stop just before the clock in order to print
esim run 200
}
#
# dump registers and memory
# output some general registers
puts " General registers at end of simulation "
puts "greg 0- 3= [esim read -hex greg.mr  0x0 32] [esim read -hex greg.mr 0x20 32] [esim read -hex greg.mr 0x40 32] [esim read -hex greg.mr 0x60 32]"
puts "greg 4- 7= [esim read -hex greg.mr  0x80 32] [esim read -hex greg.mr 0xA0 32] [esim read -hex greg.mr 0xC0 32] [esim read -hex greg.mr 0xE0 32]"
puts "greg 8-11= [esim read -hex greg.mr  0x100 32] [esim read -hex greg.mr 0x120 32] [esim read -hex greg.mr 0x140 32] [esim read -hex greg.mr 0x160 32]"
puts "greg12-15= [esim read -hex greg.mr  0x180 32] [esim read -hex greg.mr 0x1A0 32] [esim read -hex greg.mr 0x1C0 32] [esim read -hex greg.mr 0x1E0 32]"
#
# more output, data memory
puts " Data Memory at end of simulation "
puts "dmem 0- 3= [esim read -hex dmem.mr  0x0 32] [esim read -hex dmem.mr 0x20 32] [esim read -hex dmem.mr 0x40 32] [esim read -hex dmem.mr 0x60 32]"
puts "dmem 4- 7= [esim read -hex dmem.mr  0x80 32] [esim read -hex dmem.mr 0xA0 32] [esim read -hex dmem.mr 0xC0 32] [esim read -hex dmem.mr 0xE0 32]"
puts "dmem 8-11= [esim read -hex dmem.mr  0x100 32] [esim read -hex dmem.mr 0x120 32] [esim read -hex dmem.mr 0x140 32] [esim read -hex dmem.mr 0x160 32]"
puts "dmem12-15= [esim read -hex dmem.mr  0x180 32] [esim read -hex dmem.mr 0x1A0 32] [esim read -hex dmem.mr 0x1C0 32] [esim read -hex dmem.mr 0x1E0 32]"
#
puts "part1a.out finished"