// language demonstration

// defining a component, fadd, that happens to be a full adder
define fadd(a, b, cin, s, cout)

// note parameters are by definition of type signal
// parameters may be inputs, outputs, both or unused
// in this component: a, b, cin are inputs, s and cout are outputs

circuits      // note the plural!  note no semicolon!  closed by end circuits;

//  the statements that follow are all executed in parallel
//  the order of the statements means nothing to the simulation, but
//  a nice ordering can make it easier to read and understand

  s <= a ^ b ^ cin;  // ^ is exclusive or, default update of s is 5ns
                     // after a change to a, b or cin
  cout <= (a&b)|(a&cin)|(b&cin) after 2ns;
                    // & is logical and, | is logical or
                    // the default update delay has been replaced by 2ns
end circuits;
end fadd;           // end of component  fadd  definition

// components can be used to build bigger components
// here is a four bit adder, add4, built from four uses of  fadd

define add4(aw[4], bw[4], cin, sum[4], cout)

  //  aw[4] defines the parameter as being 4 bits wide

signal c[3];  // three bit temporary is needed inside this component
              // in this case to pass the cout of one adder stage
              // to the cin of the next adder stage
circuits

  s0 use fadd(aw[0], bw[0], cin,  sum[0], c[0]);
  // this gives the name s0 to an instance of fadd
  // aw[0] is the zeroth (first, low order) bit of the four bit signal aw

  s1 use fadd(aw[1], bw[1], c[0], sum[1], c[1]);
  s2 use fadd(aw[2], bw[2], c[1], sum[2], c[2]);
  s3 use fadd(aw[3], bw[3], c[2], sum[3], cout);

  // each instance name must be unique within a component definition
end circuits;
end add4;

// now, define the top level circuit to be simulated
// all components must be defined before they are used
// all signals must be defined before they are used

signal a[4] <= #b0101;  // a[0] is 1, a[1] is zero, a[2] is one, a[3] is zero
signal b[4] <= #hF;     // all bits of b are ones, h for hexadecimal, 4 bits
signal cout;            // no initial value, thus value is X, unknown
signal cin <= #b0;
signal s[4];
circuits               // top level of hierarchy, not enclosed in 'define'
  adder use add4(a, b, cin, s, cout);

  // instantiate add4 with the signal names a, b, cin, s, cout
  // this in turn instantiates four copies if fadd with appropriate
  // substitution of signal names
end circuits;         // end of top level circuit