// tadd32c.e  test  add32  component in file   add32c.e
//            also uses  add4c  component in file  add4c.e


//  Note: compile and simulate by typing two lines
//        ecomp add4c.e add32c.e tadd32c.e -o tadd32c.net
//        esim < tadd32c.run > tadd32c.out
//        your results are in tadd32c.out, look at them with an editor

// define a five bit counter component
// cntr[5] is the 5 bits to be counted (initialize to zero)
// clk is the system clock             (initialize to 1)

define counter5(cntr[5], clk)
circuits
  clk <= ~clk after 20ns;             // clock period is 40 ns
  cntr[0] <= ~cntr[0] on falling clk;
  cntr[1] <= ~cntr[1] on falling cntr[0];
  cntr[2] <= ~cntr[2] on falling cntr[1];
  cntr[3] <= ~cntr[3] on falling cntr[2];
  cntr[4] <= ~cntr[4] on falling cntr[3];
end circuits;
end counter5;

// main circuit

signal clk <= #b1;          // initial value binary 1
signal cntr[5] <= #b00000;  // initial value five bits of zero
signal a[32] <= #h00000000; // initial value of 32 bits of zero
signal b[32] <= #hFFFFFFFF; // initial 32 bit hexadecimal value    
signal cin;
signal cout;            
signal sum[32];
signal co2;                 // test with a and b interchanged
signal s2[32];              // to be sure circuit is symmetric
circuits 
  // generate cin and some a's
  cin   <= cntr[0];
  a[0]  <= cntr[1];
  a[4]  <= cntr[2];
  a[8]  <= cntr[3];
  a[28] <= cntr[4];

  count use counter5(cntr, clk);

  adder use add32(a, b, cin, sum, cout);
  addrv use add32(b, a, cin, s2,  co2);

end circuits;         // end of top level circuit