// jkff_cntr.e   full JK flip flop coded as nand gates, tested as counter
//               also can be a master slave flip flop
//               also can be an edge triggered flip flop
//               also can be an AC flip flop

//           since nand is not an esim primitive, create a nand gate
define nand(a, b, c, out)
  circuits
    out <= ~(a&b&c) after 1ns;  // not of the and of a, b, c
  end circuits;  // pad unused inputs with #b1 or another copy of input
end nand;


define jkff(j, k, clk, r, s, q, q_)  //  full JK flip flop
                             // j and k are read on falling clock
                             // j and k can be active inputs when clock is hi
                             // clk is typically system clock gated by signal
                             // q is output, q_ is complement output
                             // r is reset, normally high, low to reset (clear)
                             // s is set,   normally high, low to set (preset)
  signal jc, kc, m0, m0_, m1, m1_, clk_;   // internal signals
  circuits
    jc  use nand(j  , clk , #b1, jc  );  
    kc  use nand(k  , clk , #b1, kc  );
    m0  use nand(m0_, jc  , s  , m0  );
    m0_ use nand(m0 , kc  , r  , m0_ );
    c_  use nand(clk, #b1 , #b1, clk_);
    m1  use nand(m0 , clk_, #b1, m1  );
    m1_ use nand(m0_, clk_, #b1, m1_ );
    q   use nand(q_ , m1  , s  , q   );
    q_  use nand(q  , m1_ , r  , q_  );
  end circuits;
end jkff;

// test circuit that makes a four bit counter out of JK flip flops
//
signal clk <= #b1;
signal start <= #b1; // used for circuit initialization 
signal reset <= #b0; // reset signal to all D flip flops
signal set   <= #b1; // set   signal to all D flip flops
// J flip flop inputs (also used in cntr as K inputs) are #b1, other outputs
signal q0, q1, q2, q3;  // JK flip flop outputs
signal q0_, q1_, q2_, q3_; // JK flip flop complement outputs(spoken as q0 bar)
// one standard circuit symbol for complement is a bar over the top of a signal
circuits
  clk <= ~clk after 50ns;    // control circuitry, can have long ripple
  start <= #b0 after 15ns;   // 1 initially, then always zero
  reset <= ~start after 1ns; // one time reset based on start

  jkff0 use jkff(q0_, q0, clk, reset, set, q0, q0_);
  jkff1 use jkff(q1_, q1, q0,  reset, set, q1, q1_);
  jkff2 use jkff(q2_, q2, q1,  reset, set, q2, q2_);
  jkff3 use jkff(q3_, q3, q2,  reset, set, q3, q3_);

  // circuitry that makes a four bit counter out of JK flip flops
  // NONE! wiring the q output to the next clock input builds the counter
end circuits;