// bshift.e // barrel shifter 32 bits left, right logical, right arithmetic // inputs inp[32], left, log for logical, shft[5] is shift count // output out[32] define bshift(inp[32], left, log, shft[5], out[32]) signal L1[32]; signal L2[32]; signal L3[32]; signal L4[32]; signal L5[32]; signal L6[32]; signal R1[32]; signal R2[32]; signal R3[32]; signal R4[32]; signal R5[32]; signal A1[32]; signal A2[32]; signal A3[32]; signal A4[32]; signal A5[32]; signal s1; signal s2[2]; signal s4[4]; signal s8[8]; circuits s1 <= inp[31] after 1ns; // groups of sign bits s2 <= inp[31].inp[31] after 1ns; s4 <= inp[31].inp[31].inp[31].inp[31] after 1ns; s8 <= inp[31].inp[31].inp[31].inp[31]. inp[31].inp[31].inp[31].inp[31] after 1ns; L1 <= inp[30:0].#b0 when shft[0] else inp after 1ns; L2 <= L1[29:0].#b00 when shft[1] else L1 after 1ns; L3 <= L2[27:0].#h0 when shft[2] else L2 after 1ns; L4 <= L3[23:0].#h00 when shft[3] else L3 after 1ns; L5 <= L4[15:0].#h0000 when shft[4] else L4 after 1ns; R1 <= #b0.inp[31:1] when shft[0] else inp after 1ns; R2 <= #b00.R1[31:2] when shft[1] else R1 after 1ns; R3 <= #h0.R2[31:4] when shft[2] else R2 after 1ns; R4 <= #h00.R3[31:8] when shft[3] else R3 after 1ns; R5 <= #h0000.R4[31:16] when shft[4] else R4 after 1ns; A1 <= s1.inp[31:1] when shft[0] else inp after 1ns; A2 <= s2.A1[31:2] when shft[1] else A1 after 1ns; A3 <= s4.A2[31:4] when shft[2] else A2 after 1ns; A4 <= s8.A3[31:8] when shft[3] else A3 after 1ns; A5 <= s8.s8.A4[31:16] when shft[4] else A4 after 1ns; out <= L5 when left else (R5 when log else A5) after 1ns; end circuits; end bshift; // test circuit driver below, remove this for use as a component !!! // or at least comment it out. signal a[32] <= #h01234567; signal b[32]; signal shft[5] <= #b01010; signal left <= #b1; // 1 for left, 0 for right signal log <= #b1; // 1 for logical, 0 for right arithmetic circuits s0 use bshift(a, left, log, shft, b); end circuits;