# Makefile for divcas4_test for Cadence VHDL

all: divcas4_test.out

divcas4_test.out: divcas4_test.vhdl divcas4_test.run
	ncvhdl -v93 divcas4_test.vhdl
	ncelab -v93 divcas4_test:test
	ncsim -batch -logfile divcas4_test.out -input divcas4_test.run divcas4_test